Datasheet ADP1822 (Analog Devices) - 6

ADP1822 Data Sheet SIMPLIFIED BLOCK DIAGRAM SHDN ADP1822 VCC UVLO LOGIC FAULT THERMAL BST GND SHUTDOWN DH FREQ S Q SW OSCILLATOR SYNC PWM PVCC COMP R Q DL MAR DECODE MSEL PGND VCC CSL MUP MDN DGND TRKP TRKN FB VREF OV 100kΩ REFERENCE SS 0.8V UV PWGD 2.5kΩ FAULT UVLO THSD
002 1- 1 053 Figure 3. Simplified Block Diagram Rev. D | Page 6 of 24 Document Outline Features Applications General Description Revision History Specifications Absolute Maximum Ratings ESD Caution Simplified Block Diagram Pin Configuration and Function Descriptions Typical Performance Characteristics Theory of Operation Current-Limit Scheme Output Voltage Margining Output Voltage Tracking Soft Start High-Side Driver (BST and DH) Low-Side Driver (DL) Input Voltage Range Setting the Output Voltage Switching Frequency Control Compensation Power-Good Indicator Shutdown Control Application Information Selecting the Input Capacitor Output LC Filter Selecting the MOSFETS Setting the Current Limit Feedback Voltage Divider Setting the Voltage Margin Compensating the Regulator Compensation Using the ESR Zero Compensation Using Feed-Forward Compensation Using Both the ESR and Feed-Forward Zeros Setting the Soft Start Period Synchronizing the Converter Setting the Output Voltage Tracking Application Circuits Outline Dimensions Ordering Guide