Datasheet STGAP2HS (STMicroelectronics) - 10
| 制造商 | STMicroelectronics |
| 描述 | Galvanically isolated 4 A single gate driver |
| 页数 / 页 | 24 / 10 — STGAP2HS. Standby function. 6.7. Figure 6. Standby state sequences. … |
| 文件格式/大小 | PDF / 466 Kb |
| 文件语言 | 英语 |
STGAP2HS. Standby function. 6.7. Figure 6. Standby state sequences. DS13393. Rev 2. page 10/24
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STGAP2HS Standby function 6.7 Standby function
In order to reduce the power consumption of both control interface and gate driving sides the device can be put in standby mode. In standby mode the quiescent current from VDD and VH supply pins is reduced to IQDDSBY and IQHSBY respectively, and the output remains in “safe state” (the output is actively forced low). The way to enter standby is to keep both IN+ and IN- high (“standby” value) for a time longer than tSTBY. During stand-by the inputs can change from the “standby” value. To exit stand-by, IN+ and IN- must be put in any combination different from the “standby” value for a time longer than tstbyfilt, and then in the “standby” value for a time t such that tWUP<t <tSTBY. When the input configuration is changed from the “standby” value the output is enabled and set according to inputs state after a time tawake.
Figure 6. Standby state sequences
Sequence to enter stand-by mode “stand-by”: IN+ = IN- = HIGH t < tSTBY t = tSTBY is any different combination duration too short IN+ & IN- “stand-by” “stand-by” Device status ACTIVE STAND-BY Output ACTIVE SAFE-STATE Sequence to exit stand-by mode t = t t > tstbyfilt t < t STBY WUP t > tSTBY tWUP < t < tSTBY t = tawake duration duration too long too short IN+ & IN- “stand-by” “stand-by” “stand-by” “stand-by” Device status ACTIVE STAND-BY ACTIVE Output ACTIVE SAFE-STATE ACTIVE
DS13393
-
Rev 2 page 10/24
Document Outline Cover image Product status link / summary Features Application Description 1 Block diagram 2 Pin description and connection diagram 3 Electrical data 3.1 Absolute maximum ratings 3.2 Thermal data 3.3 Recommended operating conditions 4 Electrical characteristics 5 Isolation 6 Functional description 6.1 Gate driving power supply and UVLO 6.2 Power-up, power-down and “safe state” 6.3 Control inputs 6.4 Miller Clamp function 6.5 Watchdog 6.6 Thermal shutdown protection 6.7 Standby function 7 Typical application diagram 8 Layout 8.1 Layout guidelines and considerations 8.2 Layout example 9 Testing and characterization information 10 Package information 10.1 SO-8W package information 10.2 SO-8W suggested land pattern 11 Ordering information Revision history Contents List of tables List of figures
In order to reduce the power consumption of both control interface and gate driving sides the device can be put in standby mode. In standby mode the quiescent current from VDD and VH supply pins is reduced to IQDDSBY and IQHSBY respectively, and the output remains in “safe state” (the output is actively forced low). The way to enter standby is to keep both IN+ and IN- high (“standby” value) for a time longer than tSTBY. During stand-by the inputs can change from the “standby” value. To exit stand-by, IN+ and IN- must be put in any combination different from the “standby” value for a time longer than tstbyfilt, and then in the “standby” value for a time t such that tWUP<t <tSTBY. When the input configuration is changed from the “standby” value the output is enabled and set according to inputs state after a time tawake.
Figure 6. Standby state sequences
Sequence to enter stand-by mode “stand-by”: IN+ = IN- = HIGH t < tSTBY t = tSTBY is any different combination duration too short IN+ & IN- “stand-by” “stand-by” Device status ACTIVE STAND-BY Output ACTIVE SAFE-STATE Sequence to exit stand-by mode t = t t > tstbyfilt t < t STBY WUP t > tSTBY tWUP < t < tSTBY t = tawake duration duration too long too short IN+ & IN- “stand-by” “stand-by” “stand-by” “stand-by” Device status ACTIVE STAND-BY ACTIVE Output ACTIVE SAFE-STATE ACTIVE
DS13393
-
Rev 2 page 10/24
Document Outline Cover image Product status link / summary Features Application Description 1 Block diagram 2 Pin description and connection diagram 3 Electrical data 3.1 Absolute maximum ratings 3.2 Thermal data 3.3 Recommended operating conditions 4 Electrical characteristics 5 Isolation 6 Functional description 6.1 Gate driving power supply and UVLO 6.2 Power-up, power-down and “safe state” 6.3 Control inputs 6.4 Miller Clamp function 6.5 Watchdog 6.6 Thermal shutdown protection 6.7 Standby function 7 Typical application diagram 8 Layout 8.1 Layout guidelines and considerations 8.2 Layout example 9 Testing and characterization information 10 Package information 10.1 SO-8W package information 10.2 SO-8W suggested land pattern 11 Ordering information Revision history Contents List of tables List of figures