Datasheet STDRIVE101 (STMicroelectronics) - 4
| 制造商 | STMicroelectronics |
| 描述 | Triple half-bridge gate driver |
| 页数 / 页 | 32 / 4 — STDRIVE101. Recommended operating conditions. 2.2. Table 2. Recommended … |
| 文件格式/大小 | PDF / 899 Kb |
| 文件语言 | 英语 |
STDRIVE101. Recommended operating conditions. 2.2. Table 2. Recommended operating conditions. Symbol. Parameter. Test Condition. Min
该数据表的模型线
文件文字版本
link to page 4 link to page 4 link to page 4 link to page 4 link to page 4 link to page 4 link to page 2
STDRIVE101 Recommended operating conditions 2.2 Recommended operating conditions Table 2. Recommended operating conditions Symbol Parameter Test Condition Min. Typ. Max. Unit
VS Supply voltage 5.5(1) 75 V VS ≥ 15 V 12 V V 12 V linear regulator output and REG12 gate driving supply voltage VS shorted to REG12 5.5 (1) 15 V VBOOTx Bootstrap pin voltage 89 V 12 V linear regulator total current I Internal (gate drivers) and external REG12 50 mA consumption (2) consumption C 12 V linear regulator output REG12 4.7 µF capacitance ENx/INx mode 50 250 RDT Deadtime resistor kΩ INHx/INLx mode Short to ground VIN Logic input voltage 0 5 (3) V V Overcurrent comparator input CP -1 1 V voltage V Protection enabled 0.2 2.5 V V DS monitoring protection SCREF reference voltage (4) Protection disabled 2.9 3.3 V VFAULT nFAULT output voltage 0 5 V Tamb Operative ambient temperature -40 125 (5) °C 1. Actual operative range can be limited by UVLO protections 2. Actual linear regulator current consumption can be limited by power dissipation 3. All digital inputs are 3.3 V TTL/CMOS thresholds compliant and 5 V tolerant. They can be biased within the respective AMR whatever the supply condition of the device (supplied, floating or shorted to ground) without causing damage to the device. 4. SCREF pin structure does not allow a bias without VS supply voltage 5. Actual operative range is limited by thermal shutdown Important:
It is mandatory to use a VS voltage equal or greater than power stage voltage (VM in Figure 1 ). If not, the device is damaged. DS13472
-
Rev 1 page 4/32
Document Outline Cover image Product status link / summary Features Application Description 1 Block diagram 2 Electrical data 2.1 Absolute maximum ratings 2.2 Recommended operating conditions 2.3 Thermal data 2.4 Electrical sensitivity characteristics 3 Electrical characteristics 4 Pin description 5 Device description 5.1 Gate drivers’ characteristics 5.2 12 V LDO linear regulator 5.2.1 Bootstrap section 5.2.1.1 Power-up and wake-up 5.2.1.2 Charging time and external bootstrap diodes 5.2.2 Externally provided gate driver’s supply voltage 5.3 Control logic 5.3.1 Deadtime 5.4 Standby mode 5.5 Undervoltage protection 5.6 VDS monitoring protection 5.7 Overcurrent comparator 5.8 Thermal protection 6 ESD protection strategy 7 Application example 8 Package information 9 Ordering information Revision history Contents List of tables List of figures
STDRIVE101 Recommended operating conditions 2.2 Recommended operating conditions Table 2. Recommended operating conditions Symbol Parameter Test Condition Min. Typ. Max. Unit
VS Supply voltage 5.5(1) 75 V VS ≥ 15 V 12 V V 12 V linear regulator output and REG12 gate driving supply voltage VS shorted to REG12 5.5 (1) 15 V VBOOTx Bootstrap pin voltage 89 V 12 V linear regulator total current I Internal (gate drivers) and external REG12 50 mA consumption (2) consumption C 12 V linear regulator output REG12 4.7 µF capacitance ENx/INx mode 50 250 RDT Deadtime resistor kΩ INHx/INLx mode Short to ground VIN Logic input voltage 0 5 (3) V V Overcurrent comparator input CP -1 1 V voltage V Protection enabled 0.2 2.5 V V DS monitoring protection SCREF reference voltage (4) Protection disabled 2.9 3.3 V VFAULT nFAULT output voltage 0 5 V Tamb Operative ambient temperature -40 125 (5) °C 1. Actual operative range can be limited by UVLO protections 2. Actual linear regulator current consumption can be limited by power dissipation 3. All digital inputs are 3.3 V TTL/CMOS thresholds compliant and 5 V tolerant. They can be biased within the respective AMR whatever the supply condition of the device (supplied, floating or shorted to ground) without causing damage to the device. 4. SCREF pin structure does not allow a bias without VS supply voltage 5. Actual operative range is limited by thermal shutdown Important:
It is mandatory to use a VS voltage equal or greater than power stage voltage (VM in Figure 1 ). If not, the device is damaged. DS13472
-
Rev 1 page 4/32
Document Outline Cover image Product status link / summary Features Application Description 1 Block diagram 2 Electrical data 2.1 Absolute maximum ratings 2.2 Recommended operating conditions 2.3 Thermal data 2.4 Electrical sensitivity characteristics 3 Electrical characteristics 4 Pin description 5 Device description 5.1 Gate drivers’ characteristics 5.2 12 V LDO linear regulator 5.2.1 Bootstrap section 5.2.1.1 Power-up and wake-up 5.2.1.2 Charging time and external bootstrap diodes 5.2.2 Externally provided gate driver’s supply voltage 5.3 Control logic 5.3.1 Deadtime 5.4 Standby mode 5.5 Undervoltage protection 5.6 VDS monitoring protection 5.7 Overcurrent comparator 5.8 Thermal protection 6 ESD protection strategy 7 Application example 8 Package information 9 Ordering information Revision history Contents List of tables List of figures