Datasheet LT8650S (Analog Devices) - 10

link to page 15 link to page 15 LT8650S
PIN FUNCTIONS RT (Pin 1):
A resistor is tied between RT and ground to is within ±7.5% of the final regulation voltage, and there set the switching frequency. are no fault conditions. PG1 is pulled low during VIN1
V
UVLO, V
IN1 (Pin 4, 5):
The VIN1 pin supplies current to the LT8650S CC UVLO, Thermal Shutdown, or when the EN/ internal circuitry and to the internal top side power switch UV1 pin is low. of channel 1. This pin must be locally bypassed. Be sure to
PG2 (Pin 15):
The PG2 pin is the open-drain output of an place the positive terminal of the input capacitor as close internal comparator. PG2 remains low until the FB2 pin as possible to the VIN1 pin, and the negative capacitor is within ±7.5% of the final regulation voltage, and there terminal as close as possible to the GND pins. VIN1 must are no fault conditions. PG2 is pulled low during VIN1 be 3V or higher for LT8650S to operate. UVLO, VCC UVLO, Thermal Shutdown, or when both the
V
EN/UV2 pin is low.
IN2 (Pin 7, 8):
The VIN2 pin supplies current to the internal top side power switch of channel 2. This pin must be lo-
SYNC (Pin 16):
External Clock Synchronization Input. cally bypassed. Be sure to place the positive terminal of Ground this pin for low ripple Burst Mode operation at the input capacitor as close as possible to the VIN2 pin, low output loads. Apply a DC voltage of 2.8V to 4V or tie and the negative capacitor terminal as close as possible to VCC for forced continuous mode with spread spectrum to the GND pins. This input is capable of operating from modulation. Float the SYNC pin for forced continuous a different supply than VIN1. VIN1 must be present to run mode without spread spectrum modulation. Apply a clock channel 2. source to the SYNC pin for synchronization to an external
EN/UV1 (Pin 11):
Channel 1 of the LT8650S is shut down frequency. The LT8650S will be in forced continuous mode when this pin is low and active when this pin is high. The when an external frequency is applied. hysteretic threshold voltage is 0.77V going up and 0.74V
CLKOUT (Pin 17):
In forced continuous mode, the CLKOUT going down. Tie to VIN1 if the shutdown feature is not pin provides a 50% duty cycle square wave 90 degrees used. An external resistor divider from VIN1 can be used out of phase with channel 1. This allows synchronization to program a VIN threshold below which channel 1 of the with other regulators with up to four phases. When an LT8650S will shut down. Do not float this pin. external clock is applied to the SYNC pin, the CLKOUT pin
EN/UV2 (Pin 12):
Channel 2 of the LT8650S is shut down will output a waveform with the same phase, duty cycle, when this pin is low and active when this pin is high. The and frequency as the SYNC waveform. In burst mode, hysteretic threshold voltage is 0.77V going up and 0.74V the CLKOUT pin will be low. Float this pin if the CLKOUT going down. Tie to V function is not used. IN2 if shutdown feature is not used. An external resistor divider from VIN2 can be used to program
BST2 (Pin 18):
This pin is used to provide a drive volt- a VIN threshold below which channel 2 of the LT8650S age, higher than the input voltage, to the top side power will shut down. Do not float this pin. switch of channel 2.
TEMP (Pin 13):
Temperature Output Pin. This pin outputs
SW2 (Pin 19, 20):
The SW2 pin is the output of the chan- a voltage proportional to junction temperature. The pin is nel 2 internal power switches. Tie these pins together and 250mV for 25°C and has a slope of 9.5mV/°C. The output connect them to the inductor and boost capacitor. This node of this pin is not valid during light output loads on both should be kept small on the PCB for good performance. channels while in Burst Mode operation. Put the LT8650S
SW1 (Pin 22, 23):
The SW1 pin is the output of the chan- in forced continuous mode for the TEMP output to be valid nel 1 internal power switches. Tie these pins together and across the entire output load range. See the Applications connect them to the inductor and boost capacitor. This node Information section for more information. should be kept small on the PCB for good performance.
PG1 (Pin 14):
The PG1 pin is the open-drain output of an internal comparator. PG1 remains low until the FB1 pin Rev. B 10 For more information www.analog.com Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Order Information Pin Configuration Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Typical Applications Package Description Revision History Typical Application Related Parts