Datasheet LTC7103 (Analog Devices) - 10
| 制造商 | Analog Devices |
| 描述 | 105V, 2.3A Low EMI Synchronous Step-Down Regulator |
| 页数 / 页 | 40 / 10 — PIN FUNCTIONS IMON (Pin 17):. INTVCC (Pin 21):. PRG1, VPRG2 (Pins … |
| 修订版 | B |
| 文件格式/大小 | PDF / 2.1 Mb |
| 文件语言 | 英语 |
PIN FUNCTIONS IMON (Pin 17):. INTVCC (Pin 21):. PRG1, VPRG2 (Pins 18,19):. SW (Pins 24, 25, 26):. BOOST (Pin 27):
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PIN FUNCTIONS IMON (Pin 17):
Average Output Current Monitor. This pin
INTVCC (Pin 21):
Output of the Internal LDO regulator. The generates a voltage between 0.4V and 1.3V that corre- driver and control circuits are powered from this voltage sponds to an average output current between 0A and 2.5A. source. Must be decoupled to PGND with a 1µF to 4.7μF
V
ceramic capacitor.
PRG1, VPRG2 (Pins 18,19):
Output Voltage Programming Pins. These pins set the regulator to adjustable output
SW (Pins 24, 25, 26):
SW Node connection from the mode or to fixed output mode. Floating both pins allows internal MOSFET power switches to the output inductor. the output to be programmed through the VFB pin using
BOOST (Pin 27):
Bootstrapped Supply to the High Side external resistors, regulating VFB to the 1V reference. Floating Gate Driver. Connect a 0.1µF ceramic capacitor Tying one of these pins to SGND or INTVCC while the other between the BOOST and SW pins. is tied to SGND, INTVCC or floating programs the output to one of eight fixed output voltages. See Output Voltage
VIN (Pins 30, 31, 32):
Power Input Supply. This is the Programming in the Applications Information section. power input to the integrated high side MOSFET switch as well as the input to the internal LDO that generates INTV
EXTV
CC
CC (Pin 20):
External Power Input to an Internal voltage. Decouple this pin with a capacitor to PGND. LDO that Generates INTVCC. This LDO supplies INTVCC power from EXTVCC, bypassing the internal LDO pow-
PGND/Exposed Pad (Pin 35, 36, 37):
Power Ground. ered from VIN whenever EXTVCC is between 3.1V and Connect to power ground plane. The exposed pad must 40V. If EXTVCC is not used, the regulator timeout fea- be connected to PCB ground for rated electrical and ther- ture must be disabled by tying a 75k resistor between SS mal performance. and INTVCC. See INTVCC Regulations in the Applications Information section. Rev. B 10 For more information www.analog.com Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Order Information Pin Configuration Electrical Characteristics Typical Performance Characteristics Pin Functions Functional Diagram Operation Applications Information Package Description Revision History Typical Application Related Parts
PIN FUNCTIONS IMON (Pin 17):
Average Output Current Monitor. This pin
INTVCC (Pin 21):
Output of the Internal LDO regulator. The generates a voltage between 0.4V and 1.3V that corre- driver and control circuits are powered from this voltage sponds to an average output current between 0A and 2.5A. source. Must be decoupled to PGND with a 1µF to 4.7μF
V
ceramic capacitor.
PRG1, VPRG2 (Pins 18,19):
Output Voltage Programming Pins. These pins set the regulator to adjustable output
SW (Pins 24, 25, 26):
SW Node connection from the mode or to fixed output mode. Floating both pins allows internal MOSFET power switches to the output inductor. the output to be programmed through the VFB pin using
BOOST (Pin 27):
Bootstrapped Supply to the High Side external resistors, regulating VFB to the 1V reference. Floating Gate Driver. Connect a 0.1µF ceramic capacitor Tying one of these pins to SGND or INTVCC while the other between the BOOST and SW pins. is tied to SGND, INTVCC or floating programs the output to one of eight fixed output voltages. See Output Voltage
VIN (Pins 30, 31, 32):
Power Input Supply. This is the Programming in the Applications Information section. power input to the integrated high side MOSFET switch as well as the input to the internal LDO that generates INTV
EXTV
CC
CC (Pin 20):
External Power Input to an Internal voltage. Decouple this pin with a capacitor to PGND. LDO that Generates INTVCC. This LDO supplies INTVCC power from EXTVCC, bypassing the internal LDO pow-
PGND/Exposed Pad (Pin 35, 36, 37):
Power Ground. ered from VIN whenever EXTVCC is between 3.1V and Connect to power ground plane. The exposed pad must 40V. If EXTVCC is not used, the regulator timeout fea- be connected to PCB ground for rated electrical and ther- ture must be disabled by tying a 75k resistor between SS mal performance. and INTVCC. See INTVCC Regulations in the Applications Information section. Rev. B 10 For more information www.analog.com Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Order Information Pin Configuration Electrical Characteristics Typical Performance Characteristics Pin Functions Functional Diagram Operation Applications Information Package Description Revision History Typical Application Related Parts