Datasheet AD711 (Analog Devices) - 10

AD711
compared to a series of switched trial currents. The comparison Figures 8 and 9 show the AD711 and AD7545 (12-bit CMOS point is diode clamped but may deviate several hundred millivolts DAC) configured for unipolar binary (2-quadrant multiplication) resulting in high frequency modulation of A/D input current. or bipolar (4-quadrant multiplication) operation. Capacitor C1 provides phase compensation to reduce overshoot and ringing. Figures 10a and 10b show the settling time characteristics of the
R2*
AD711 when used as a DAC output buffer for the AD7545.
+15 VDD C1 0.1 F 33pF GAIN ADJUST V R DD FB OUT1 VIN VREF AD7545 AD711K VOUT R1* DGND AGND CF 0.1 F ANALOG COMMON DB11-DB0 *FOR VALUES R1 AND R2, –15 REFER TO TABLE 1
Figure 8. Unipolar Binary Operation a. Full-Scale Positive b. Full-Scale Negative Transition Transition R1 and R2 calibrate the zero offset and gain error of the DAC. Figure 10. Settling Characteristics for AD711 with AD7545 Specific values for these resistors depend upon the grade of compared to a series of switched trial currents. The comparison AD7545 and are shown below. point is diode clamped but may deviate several hundred milli- volts resulting in high frequency modulation of A/D input
Table I. Recommended Trim Resistor Values vs. Grades
current. The output impedance of a feedback amplifier is made
of the AD7545 for VDD = 5 V
artificially low by the loop gain. At high frequencies, where the loop gain is low, the amplifier output impedance can approach
TRIM
its open loop value. Most IC amplifiers exhibit a minimum open
RESISTOR JN/AQ/SD KN/BQ/TD LN/CQ/UD GLN/GCQ/GUD
loop output impedance of 25 W due to current limiting resistors. R1 500 W 200 W 100 W 20 W A few hundred microamps reflected from the change in con- R2 150 W 68 W 33 W 6.8 W verter loading can introduce errors in instantaneous input
NOISE CHARACTERISTICS 12/8 STS
The random nature of noise, particularly in the 1/f region, makes
CS
it difficult to specify in practical terms. At the same time,
HIGH A
designers of precision instrumentation require certain guaranteed
O BITS AD574
maximum noise levels to realize the full accuracy of their equipment.
R/C GAIN MIDDLE ADJUST
The AD711C grade is specified at a maximum level of 4.0 mV p-p,
CE BITS
in a 0.1 Hz to 10 Hz bandwidth. Each AD711C receives a 100%
REF IN R2 LOW
noise test for two 10-second intervals; devices with any excursion
100 REF OUT BITS
in excess of 4.0 mV are rejected. The screened lot is then submitted
R1 +15V 100
to Quality Control for verification on an AQL basis.
0.1 F BIP OFF +5V
All other grades of the AD711 are sample-tested on an AQL
OFFSET 10VIN +15V ADJUST
basis to a limit of 6 mV p-p, 0.1 to 10 Hz.
10V AD711 20V –15V IN ANALOG 0.1 F ANA COM DIG COM INPUT DRIVING THE ANALOG INPUT OF AN A/D CONVERTER
An op amp driving the analog input of an A/D converter, such
–15V ANALOG COM
as that shown in Figure 11, must be capable of maintaining a constant output voltage under dynamically changing load conditions. Figure 11. AD711 as ADC Unity Gain Buffer In successive-approximation converters, the input current is
R4 R5 R2* 20k 20k VDD 1% 1% +15V C1 0.1 F +15V GAIN 33pF R3 0.1 F ADJUST V R 10k DD FB OUT1 1% VIN V AD7545 AD711K REF R1* AGND AD711K VOUT DGND 0.1 F DB11-DB0 0.1 F 12 –15V * DATA INPUT FOR VALUES R1 AND R2, –15V ANALOG REFER TO TABLE 1 COMMON
Figure 9. Bipolar Operation –10– REV. E Document Outline FEATURES PRODUCT DESCRIPTION CONNECTION DIAGRAMS PRODUCT HIGHLIGHTS SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ORDERING GUIDE Typical Performance Characteristics OPTIMIZING SETTLING TIME OP AMP SETTLING TIME—A MATHEMATICAL MODEL GUARDING D/A CONVERTER APPLICATIONS NOISE CHARACTERISTICS DRIVING THE ANALOG INPUT OF AN A/D CONVERTER DRIVING A LARGE CAPACITIVE LOAD ACTIVE FILTER APPLICATIONS SECOND ORDER LOW PASS FILTER 9-POLE CHEBYCHEV FILTER OUTLINE DIMENSIONS Revision History