Datasheet ADCA3992 (Analog Devices) - 7
| 制造商 | Analog Devices |
| 描述 | 45 MHz to 1218 MHz, CATV Power Doubler Hybrid |
| 页数 / 页 | 9 / 7 — Data Sheet. ADCA3992. THEORY OF OPERATION. 75Ω. BIAS. CONTROL |
| 文件格式/大小 | PDF / 272 Kb |
| 文件语言 | 英语 |
Data Sheet. ADCA3992. THEORY OF OPERATION. 75Ω. BIAS. CONTROL
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Data Sheet ADCA3992 THEORY OF OPERATION
The ADCA3992 is a 75 Ω input and output matched module The module has a control pin (IADJ) to set the dc current designed for CATV applications. The ADCA3992 uses cascode consumption from low bias to the full bias of the device by field effect transistor (FET) feedback amplifiers in a Class A connecting a resistor from this pin to ground or by using a push pull configuration. The bottom half of the cascode stages positive voltage. are implemented in a single-die linear FET process that minimizes parasitics, thereby enabling higher gain. The top devices in the cascodes are implemented using a linear GaN
75Ω 75Ω
process that is able to swing very high RF voltages. The
BIAS CONTROL
frequency of operation is from 45 MHz to 1218 MHz. Internally, the ADCA3992 module uses a balun to convert the 9 00 7- input signal to a balanced signal that feeds the active stages. An 77 16 output impedance transformer and balun combination converts Figure 9. Simplified Schematic the balanced GaN signals into an unbalanced 75 Ω output. The output transformer also feeds the dc to the active stages and cancels second-order distortion products coming from the active devices. Rev. 0 | Page 7 of 9 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS GENERAL PERFORMANCE DISTORTION DATA, 40 MHz TO 550 MHz ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION APPLICATIONS INFORMATION OUTLINE DIMENSIONS ORDERING GUIDE
The ADCA3992 is a 75 Ω input and output matched module The module has a control pin (IADJ) to set the dc current designed for CATV applications. The ADCA3992 uses cascode consumption from low bias to the full bias of the device by field effect transistor (FET) feedback amplifiers in a Class A connecting a resistor from this pin to ground or by using a push pull configuration. The bottom half of the cascode stages positive voltage. are implemented in a single-die linear FET process that minimizes parasitics, thereby enabling higher gain. The top devices in the cascodes are implemented using a linear GaN
75Ω 75Ω
process that is able to swing very high RF voltages. The
BIAS CONTROL
frequency of operation is from 45 MHz to 1218 MHz. Internally, the ADCA3992 module uses a balun to convert the 9 00 7- input signal to a balanced signal that feeds the active stages. An 77 16 output impedance transformer and balun combination converts Figure 9. Simplified Schematic the balanced GaN signals into an unbalanced 75 Ω output. The output transformer also feeds the dc to the active stages and cancels second-order distortion products coming from the active devices. Rev. 0 | Page 7 of 9 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS GENERAL PERFORMANCE DISTORTION DATA, 40 MHz TO 550 MHz ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION APPLICATIONS INFORMATION OUTLINE DIMENSIONS ORDERING GUIDE