Datasheet HMC8410CHIPS (Analog Devices) - 6
| 制造商 | Analog Devices |
| 描述 | 0.01 GHz to 10 GHz, GaAs, pHEMT, MMIC, Low Noise Amplifier |
| 页数 / 页 | 17 / 6 — HMC8410CHIPS. Data Sheet. PIN CONFIGURATION AND FUNCTION DESCRIPTIONS. … |
| 修订版 | C |
| 文件格式/大小 | PDF / 427 Kb |
| 文件语言 | 英语 |
HMC8410CHIPS. Data Sheet. PIN CONFIGURATION AND FUNCTION DESCRIPTIONS. HMC8410CHIPS 2 RFOUT/VDD. TOP VIEW. (Not to Scale)
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HMC8410CHIPS Data Sheet PIN CONFIGURATION AND FUNCTION DESCRIPTIONS HMC8410CHIPS 2 RFOUT/VDD TOP VIEW (Not to Scale) RFIN/VGG1 1
002 15093- Figure 2. Pad Configuration
Table 6. Pad Function Descriptions Pin No. Mnemonic Description
1 RFIN/VGG1 RF Input (RFIN). This pin is dc-coupled and matched to 50 Ω. See Figure 4 for the interface schematic. Gate Bias of the Amplifier (VGG1). This pin is dc-coupled and matched to 50 Ω. See Figure 4 for the interface schematic. 2 RFOUT/VDD RF Output (RFOUT). This pin is dc-coupled and matched to 50 Ω. See Figure 5 for the interface schematic. Drain Bias for Amplifier (VDD). This pin is dc-coupled and matched to 50 Ω. See Figure 5 for the interface schematic. Die Bottom GND Ground. Die Bottom. This pin must be connected to RF/dc ground.
INTERFACE SCHEMATICS RFOUT/V GND DD
003 15093- 005 15093- Figure 3. GND Interface Schematic Figure 5. RFOUT/VDD Interface Schematic
RFIN/VGG1
004 15093- Figure 4. RFIN/VGG1 Interface Schematic Rev. C | Page 6 of 17 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS 0.01 GHz TO 3 GHz FREQUENCY RANGE 3 GHz TO 8 GHz FREQUENCY RANGE 8 GHz TO 10 GHz FREQUENCY RANGE ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS INTERFACE SCHEMATICS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION APPLICATIONS INFORMATION RECOMMENDED BIAS SEQUENCING MOUNTING AND BONDING TECHNIQUES FOR MILLIMETERWAVE GaAs MMICS Handling Precautions APPLICATION CIRCUIT ASSEMBLY DIAGRAM OUTLINE DIMENSIONS ORDERING GUIDE
HMC8410CHIPS Data Sheet PIN CONFIGURATION AND FUNCTION DESCRIPTIONS HMC8410CHIPS 2 RFOUT/VDD TOP VIEW (Not to Scale) RFIN/VGG1 1
002 15093- Figure 2. Pad Configuration
Table 6. Pad Function Descriptions Pin No. Mnemonic Description
1 RFIN/VGG1 RF Input (RFIN). This pin is dc-coupled and matched to 50 Ω. See Figure 4 for the interface schematic. Gate Bias of the Amplifier (VGG1). This pin is dc-coupled and matched to 50 Ω. See Figure 4 for the interface schematic. 2 RFOUT/VDD RF Output (RFOUT). This pin is dc-coupled and matched to 50 Ω. See Figure 5 for the interface schematic. Drain Bias for Amplifier (VDD). This pin is dc-coupled and matched to 50 Ω. See Figure 5 for the interface schematic. Die Bottom GND Ground. Die Bottom. This pin must be connected to RF/dc ground.
INTERFACE SCHEMATICS RFOUT/V GND DD
003 15093- 005 15093- Figure 3. GND Interface Schematic Figure 5. RFOUT/VDD Interface Schematic
RFIN/VGG1
004 15093- Figure 4. RFIN/VGG1 Interface Schematic Rev. C | Page 6 of 17 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS 0.01 GHz TO 3 GHz FREQUENCY RANGE 3 GHz TO 8 GHz FREQUENCY RANGE 8 GHz TO 10 GHz FREQUENCY RANGE ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS INTERFACE SCHEMATICS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION APPLICATIONS INFORMATION RECOMMENDED BIAS SEQUENCING MOUNTING AND BONDING TECHNIQUES FOR MILLIMETERWAVE GaAs MMICS Handling Precautions APPLICATION CIRCUIT ASSEMBLY DIAGRAM OUTLINE DIMENSIONS ORDERING GUIDE