Datasheet HMC1049SCPZ-EP (Analog Devices) - 6
| 制造商 | Analog Devices |
| 描述 | GaAs, pHEMT, MMIC, Low Noise Amplifier, 0.3 GHz to 20 GHz |
| 页数 / 页 | 10 / 6 — HMC1049SCPZ-EP. Enhanced Product. PIN CONFIGURATION AND FUNCTION … |
| 文件格式/大小 | PDF / 267 Kb |
| 文件语言 | 英语 |
HMC1049SCPZ-EP. Enhanced Product. PIN CONFIGURATION AND FUNCTION DESCRIPTIONS. TOP VIEW. (Not to Scale). ACG. NIC 1. 24 NIC. 23 NIC
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HMC1049SCPZ-EP Enhanced Product PIN CONFIGURATION AND FUNCTION DESCRIPTIONS HMC1049SCPZ-EP TOP VIEW (Not to Scale) 1 C C C C C C C NI NI ACG NI NI NI NI NI 32 31 30 29 28 27 26 25 NIC 1 24 NIC V 2 23 NIC DD NIC 3 22 GND GND 4 21 RFOUT/VDD RFIN 5 20 NIC NIC 6 19 NIC NIC 7 18 NIC NIC 8 17 NIC 9 10 11 12 13 14 15 16 C C C C 3 2 GG NC NI NI NI NI V ACG ACG NOTES 1. NIC = NOT INTERNALLY CONNECTED. THESE PINS ARE NOT CONNECTED INTERNALLY. HOWEVER, ALL DATA WAS MEASURED WITH THESE PINS CONNECTED TO RF AND DC GROUND EXTERNALLY.
004
2. EXPOSED PAD. THE EXPOSED GROUND PADDLE MUST BE CONNECTED TO RF AND DC GROUND.
17190- Figure 3. Pin Configuration Diagram
Table 7. Pin Function Descriptions Pin No. Mnemonic Description1
1, 3, 6 to 12, 14, 17 NIC Not Internally Connected. These pins are not connected internally. However, all data was measured with to 20, 23 to 29, these pins connected to RF and dc ground externally (see the Typical Performance Characteristics 31, 32 section for data plots). 2 VDD Power Supply Voltage for the Amplifier. External bypass capacitors (100 pF and 0.01 μF) are required. 4, 22 GND Ground. Connect Pin 4 and Pin 22 to RF and dc ground. 5 RFIN RF Input. This pin is dc-coupled and matched to 50 Ω. 13 VGG Gate Control for Amplifier. Adjust the voltage to achieve IDD = 70 mA. External bypass capacitors of 100 pF, 0.01 μF, and 4.7μF are required. 15, 16 ACG2, Low Frequency Termination. External bypass capacitors of 100 pF are required. ACG3 21 RFOUT/VDD RF Output/Alternate Power Supply Voltage for the Amplifier. An external bias tee is required when used as alternative VDD. This pin is dc-coupled and matched to 50 Ω. 30 ACG1 Low Frequency Termination. An external bypass capacitor of 100 pF is required. EP Exposed Pad. The exposed ground paddle must be connected to RF and dc ground. 1 See the Interface Schematics section for pin interfaces. Rev. 0 | Page 6 of 10 Document Outline FEATURES ENHANCED PRODUCT FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS 0.3 GHZ TO 1 GHZ FREQUENCY RANGE 1 GHZ TO 14 GHZ FREQUENCY RANGE 14 GHZ TO 20 GHZ FREQUENCY RANGE ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE POWER DERATING CURVES ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS INTERFACE SCHEMATICS TYPICAL PERFORMANCE CHARACTERISTICS PACKAGING AND ORDERING INFORMATION OUTLINE DIMENSIONS ORDERING GUIDE
HMC1049SCPZ-EP Enhanced Product PIN CONFIGURATION AND FUNCTION DESCRIPTIONS HMC1049SCPZ-EP TOP VIEW (Not to Scale) 1 C C C C C C C NI NI ACG NI NI NI NI NI 32 31 30 29 28 27 26 25 NIC 1 24 NIC V 2 23 NIC DD NIC 3 22 GND GND 4 21 RFOUT/VDD RFIN 5 20 NIC NIC 6 19 NIC NIC 7 18 NIC NIC 8 17 NIC 9 10 11 12 13 14 15 16 C C C C 3 2 GG NC NI NI NI NI V ACG ACG NOTES 1. NIC = NOT INTERNALLY CONNECTED. THESE PINS ARE NOT CONNECTED INTERNALLY. HOWEVER, ALL DATA WAS MEASURED WITH THESE PINS CONNECTED TO RF AND DC GROUND EXTERNALLY.
004
2. EXPOSED PAD. THE EXPOSED GROUND PADDLE MUST BE CONNECTED TO RF AND DC GROUND.
17190- Figure 3. Pin Configuration Diagram
Table 7. Pin Function Descriptions Pin No. Mnemonic Description1
1, 3, 6 to 12, 14, 17 NIC Not Internally Connected. These pins are not connected internally. However, all data was measured with to 20, 23 to 29, these pins connected to RF and dc ground externally (see the Typical Performance Characteristics 31, 32 section for data plots). 2 VDD Power Supply Voltage for the Amplifier. External bypass capacitors (100 pF and 0.01 μF) are required. 4, 22 GND Ground. Connect Pin 4 and Pin 22 to RF and dc ground. 5 RFIN RF Input. This pin is dc-coupled and matched to 50 Ω. 13 VGG Gate Control for Amplifier. Adjust the voltage to achieve IDD = 70 mA. External bypass capacitors of 100 pF, 0.01 μF, and 4.7μF are required. 15, 16 ACG2, Low Frequency Termination. External bypass capacitors of 100 pF are required. ACG3 21 RFOUT/VDD RF Output/Alternate Power Supply Voltage for the Amplifier. An external bias tee is required when used as alternative VDD. This pin is dc-coupled and matched to 50 Ω. 30 ACG1 Low Frequency Termination. An external bypass capacitor of 100 pF is required. EP Exposed Pad. The exposed ground paddle must be connected to RF and dc ground. 1 See the Interface Schematics section for pin interfaces. Rev. 0 | Page 6 of 10 Document Outline FEATURES ENHANCED PRODUCT FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS 0.3 GHZ TO 1 GHZ FREQUENCY RANGE 1 GHZ TO 14 GHZ FREQUENCY RANGE 14 GHZ TO 20 GHZ FREQUENCY RANGE ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE POWER DERATING CURVES ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS INTERFACE SCHEMATICS TYPICAL PERFORMANCE CHARACTERISTICS PACKAGING AND ORDERING INFORMATION OUTLINE DIMENSIONS ORDERING GUIDE