Datasheet HMC903LP3E (Analog Devices)

GaAs, pHEMT, MMIC, Low Noise Amplifier, 6 GHz to 17 GHz Data Sheet HMC903LP3E FEATURES FUNCTIONAL BLOCK DIAGRAM Low noise figure: 1.7 dB typical at 6 GHz to 16 GHz HMC903LP3E High gain: 18.5 dB typical at 6 GHz to 16 GHz C DD1 DD2 C NI V V NI Output power for 1 dB compression (P1dB): 14.5 dBm typical 16 15 14 13 at 6 GHz to 16 GHz Single-supply voltage: 3.5 V at 80 mA typical NIC 1 12 NIC Output third-order intercept (IP3): 25 dBm typical 50 Ω matched input/output GND 2 11 GND Self biased with optional bias control for I reduction DQ RFIN 3 10 RFOUT 16-lead, 3 mm × 3 mm, LFCSP package APPLICATIONS NIC 4 9 NIC Point to point radios 5 6 7 8 Point to multipoint radios PACKAGE C C BASE
001
NI GG1 GG2 NI Military and space V V GND
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Test instrumentation
Figure 1.
GENERAL DESCRIPTION
The HMC903LP3E is a self biased, gallium arsenide (GaAs), The P1dB output power of 14.5 dBm enables the LNA to function monolithic microwave integrated circuit (MMIC), pseudomorphic as a local oscillator (LO) driver for balanced, I/Q or image reject (pHEMT), low noise amplifier (LNA) with an option bias control mixers. The HMC903LP3E also features an input and an output for IDQ reduction. It is housed in a 16-lead, 3 mm × 3 mm, LFCSP that are dc blocked and internal y matched to 50 Ω, making it package. The HMC903LP3E amplifier operates from 6 GHz to ideal for high capacity microwave radios and video satellite 17 GHz, providing 18.5 dB of small signal gain and 1.7 dB noise (VSAT) applications. figure in the 6 GHz to 16 GHz band, and an output IP3 of 25 dBm ful band 6 GHz to 17 GHz, while requiring only 80 mA from a 3.5 V supply.
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Document Outline Features Applications Functional Block Diagram General Description Revision History Specifications 6 GHz to 16 GHz Frequency Range 16 GHz to 17 GHz Frequency Range Absolute Maximum Ratings Thermal Resistance ESD Caution Pin Configuration and Function Descriptions Interface Schematics Typical Performance Characteristics Theory of Operation Applications Information Recommended Bias Sequence During Power Up Recommended Bias Sequence During Power Down Evaluation PCB Typical Application Circuits Outline Dimensions Ordering Guide