Datasheet ADL5523 (Analog Devices) - 2
| 制造商 | Analog Devices |
| 描述 | 400 MHz to 4000 MHz Low Noise Amplifier |
| 页数 / 页 | 21 / 2 — ADL5523. Data Sheet. TABLE OF CONTENTS. REVISION HISTORY. 9/2017—Rev. B … |
| 修订版 | C |
| 文件格式/大小 | PDF / 685 Kb |
| 文件语言 | 英语 |
ADL5523. Data Sheet. TABLE OF CONTENTS. REVISION HISTORY. 9/2017—Rev. B to Rev. C. 11/2013—Rev. A to Rev. B
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ADL5523 Data Sheet TABLE OF CONTENTS
Features .. 1 900 MHz, VPOS = 3 V .. 11 Functional Block Diagram .. 1 1950 MHz, VPOS = 3 V .. 12 General Description ... 1 2600 MHz, VPOS = 3 V .. 13 Revision History ... 2 3500 MHz, VPOS = 3 V .. 14 Specifications ... 3 DC Characteristics ... 15 AC Specifications .. 3 Basic Connections .. 16 DC Specifications ... 4 Evaluation Board .. 17 De-Embedded S-Parameters, VPOS = 3 V to 5 V, RFIN = Soldering Information and Recommended PCB Land Port 1, VPOS = Port 2, RFOUT = Port 3 .. 4 Pattern .. 17 Absolute Maximum Ratings .. 5 Tuning the ADL5523 for Optimal Noise Figure .. 18 ESD Caution .. 5 Tuning S22 ... 18 Pin Configuration And Function Descriptions .. 6 Tuning the LNA Input for Optimal Gain .. 19 Typical Performance Characteristics ... 7 Tuning the LNA Input for Optimal Noise Figure .. 19 900 MHz, VPOS = 5 V ... 7 S11 of the LNA with S22 Matched ... 20 1950 MHz, VPOS = 5 V .. 8 Outline Dimensions ... 21 2600 MHz, VPOS = 5 V .. 9 Ordering Guide .. 21 3500 MHz, VPOS = 5 V .. 10
REVISION HISTORY 9/2017—Rev. B to Rev. C
Change to Figure 1 ... 1 Changes to Figure 2 and Table 5 ... 6 Change to Figure 53 ... 16 Change to Figure 54 ... 17 Updated Outline Dimensions ... 21 Changes to Ordering Guide .. 21
11/2013—Rev. A to Rev. B
Added Figure 52, Renumbered Sequentially .. 15
9/2009—Rev. 0 to Rev. A
Updated Maximum Junction Temperature Unit (Table 4) ... 5
10/2008—Revision 0: Initial Version
Rev. C | Page 2 of 21 Document Outline FEATURES FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS AC SPECIFICATIONS DC SPECIFICATIONS DE-EMBEDDED S-PARAMETERS, VPOS = 3 V TO 5 V, RFIN = PORT 1, VPOS = PORT 2, RFOUT = PORT 3 ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS 900 MHz, VPOS = 5 V 1950 MHZ, VPOS = 5 V 2600 MHz, VPOS = 5 V 3500 MHz, VPOS = 5 V 900 MHz, VPOS = 3 V 1950 MHz, VPOS = 3 V 2600 MHz, VPOS = 3 V 3500 MHz, VPOS = 3 V DC CHARACTERISTICS BASIC CONNECTIONS EVALUATION BOARD SOLDERING INFORMATION AND RECOMMENDED PCB LAND PATTERN TUNING THE ADL5523 FOR OPTIMAL NOISE FIGURE TUNING S22 TUNING THE LNA INPUT FOR OPTIMAL GAIN TUNING THE LNA INPUT FOR OPTIMAL NOISE FIGURE S11 OF THE LNA WITH S22 MATCHED OUTLINE DIMENSIONS ORDERING GUIDE
ADL5523 Data Sheet TABLE OF CONTENTS
Features .. 1 900 MHz, VPOS = 3 V .. 11 Functional Block Diagram .. 1 1950 MHz, VPOS = 3 V .. 12 General Description ... 1 2600 MHz, VPOS = 3 V .. 13 Revision History ... 2 3500 MHz, VPOS = 3 V .. 14 Specifications ... 3 DC Characteristics ... 15 AC Specifications .. 3 Basic Connections .. 16 DC Specifications ... 4 Evaluation Board .. 17 De-Embedded S-Parameters, VPOS = 3 V to 5 V, RFIN = Soldering Information and Recommended PCB Land Port 1, VPOS = Port 2, RFOUT = Port 3 .. 4 Pattern .. 17 Absolute Maximum Ratings .. 5 Tuning the ADL5523 for Optimal Noise Figure .. 18 ESD Caution .. 5 Tuning S22 ... 18 Pin Configuration And Function Descriptions .. 6 Tuning the LNA Input for Optimal Gain .. 19 Typical Performance Characteristics ... 7 Tuning the LNA Input for Optimal Noise Figure .. 19 900 MHz, VPOS = 5 V ... 7 S11 of the LNA with S22 Matched ... 20 1950 MHz, VPOS = 5 V .. 8 Outline Dimensions ... 21 2600 MHz, VPOS = 5 V .. 9 Ordering Guide .. 21 3500 MHz, VPOS = 5 V .. 10
REVISION HISTORY 9/2017—Rev. B to Rev. C
Change to Figure 1 ... 1 Changes to Figure 2 and Table 5 ... 6 Change to Figure 53 ... 16 Change to Figure 54 ... 17 Updated Outline Dimensions ... 21 Changes to Ordering Guide .. 21
11/2013—Rev. A to Rev. B
Added Figure 52, Renumbered Sequentially .. 15
9/2009—Rev. 0 to Rev. A
Updated Maximum Junction Temperature Unit (Table 4) ... 5
10/2008—Revision 0: Initial Version
Rev. C | Page 2 of 21 Document Outline FEATURES FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS AC SPECIFICATIONS DC SPECIFICATIONS DE-EMBEDDED S-PARAMETERS, VPOS = 3 V TO 5 V, RFIN = PORT 1, VPOS = PORT 2, RFOUT = PORT 3 ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS 900 MHz, VPOS = 5 V 1950 MHZ, VPOS = 5 V 2600 MHz, VPOS = 5 V 3500 MHz, VPOS = 5 V 900 MHz, VPOS = 3 V 1950 MHz, VPOS = 3 V 2600 MHz, VPOS = 3 V 3500 MHz, VPOS = 3 V DC CHARACTERISTICS BASIC CONNECTIONS EVALUATION BOARD SOLDERING INFORMATION AND RECOMMENDED PCB LAND PATTERN TUNING THE ADL5523 FOR OPTIMAL NOISE FIGURE TUNING S22 TUNING THE LNA INPUT FOR OPTIMAL GAIN TUNING THE LNA INPUT FOR OPTIMAL NOISE FIGURE S11 OF THE LNA WITH S22 MATCHED OUTLINE DIMENSIONS ORDERING GUIDE