Datasheet HMC1114PM5E (Analog Devices) - 3
| 制造商 | Analog Devices |
| 描述 | >10 W (42 dBm), 2.7 GHz to 3.8 GHz, GaN Power Amplifier |
| 页数 / 页 | 17 / 3 — Data Sheet. HMC1114PM5E. SPECIFICATIONS ELECTRICAL SPECIFICATIONS. Table … |
| 文件格式/大小 | PDF / 675 Kb |
| 文件语言 | 英语 |
Data Sheet. HMC1114PM5E. SPECIFICATIONS ELECTRICAL SPECIFICATIONS. Table 1. Parameter. Symbol Min. Typ. Max. Unit
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Data Sheet HMC1114PM5E SPECIFICATIONS ELECTRICAL SPECIFICATIONS
TA = 25°C, supply voltage (VDD) = 28 V, quiescent current (IDDQ) = 150 mA, and frequency range = 2.7 GHz to 3.2 GHz, unless otherwise noted.
Table 1. Parameter Symbol Min Typ Max Unit Test Conditions/Comments
FREQUENCY RANGE 2.7 3.2 GHz GAIN Small Signal Gain 31 34.5 dB Gain Flatness 0.8 dB RETURN LOSS Input 12 dB Output 7.5 dB POWER Output Power POUT 42 dBm PIN = 16 dBm 42 dBm PIN = 18 dBm Power Gain 25.5 dB PIN = 16 dBm 25.5 dB PIN = 18 dBm Power Added Efficiency PAE 47.5 % PIN = 16 dBm 47.5 % PIN = 18 dBm OUTPUT THIRD-ORDER INTERCEPT IP3 42.5 dBm POUT per tone = 30 dBm NOISE FIGURE NF 5.5 dB QUIESCENT CURRENT IDDQ 150 mA Adjust the gate bias control voltage (VGG) from −5 V to 0 V to achieve IDDQ = 150 mA, VGG = −2.78 V typical to achieve IDDQ = 150 mA SUPPLY VOLTAGE VDD 24 28 32 V TA = 25°C, VDD = 28 V, IDDQ = 150 mA, and frequency range = 3.2 GHz to 3.8 GHz, unless otherwise noted.
Table 2. Parameter Symbol Min Typ Max Unit Test Conditions/Comments
FREQUENCY RANGE 3.2 3.8 GHz GAIN Small Signal Gain 30 33.5 dB Gain Flatness 1 dB RETURN LOSS Input 18 dB Output 10 dB POWER Output Power POUT 41.5 dBm PIN = 16 dBm 41.5 dBm PIN = 18 dBm Power Gain 24 dB PIN = 16 dBm 23.5 dB PIN = 18 dBm Power Added Efficiency PAE 52 % PIN = 16 dBm 55 % PIN = 18 dBm OUTPUT THIRD-ORDER INTERCEPT IP3 44 dBm POUT per tone = 30 dBm NOISE FIGURE NF 5 dB QUIESCENT CURRENT IDDQ 150 mA Adjust VGG from −5 V to 0 V to achieve IDDQ = 150 mA, VGG = −2.78 V typical to achieve IDDQ = 150 mA SUPPLY VOLTAGE VDD 24 28 32 V Rev. 0 | Page 3 of 17 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ELECTRICAL SPECIFICATIONS TOTAL SUPPLY CURRENT BY VDD ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS INTERFACE SCHEMATICS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION APPLICATIONS INFORMATION RECOMMENDED BIAS SEQUENCE During Power-Up During Power-Down TYPICAL APPLICATION CIRCUIT EVALUATION PCB OUTLINE DIMENSIONS ORDERING GUIDE
TA = 25°C, supply voltage (VDD) = 28 V, quiescent current (IDDQ) = 150 mA, and frequency range = 2.7 GHz to 3.2 GHz, unless otherwise noted.
Table 1. Parameter Symbol Min Typ Max Unit Test Conditions/Comments
FREQUENCY RANGE 2.7 3.2 GHz GAIN Small Signal Gain 31 34.5 dB Gain Flatness 0.8 dB RETURN LOSS Input 12 dB Output 7.5 dB POWER Output Power POUT 42 dBm PIN = 16 dBm 42 dBm PIN = 18 dBm Power Gain 25.5 dB PIN = 16 dBm 25.5 dB PIN = 18 dBm Power Added Efficiency PAE 47.5 % PIN = 16 dBm 47.5 % PIN = 18 dBm OUTPUT THIRD-ORDER INTERCEPT IP3 42.5 dBm POUT per tone = 30 dBm NOISE FIGURE NF 5.5 dB QUIESCENT CURRENT IDDQ 150 mA Adjust the gate bias control voltage (VGG) from −5 V to 0 V to achieve IDDQ = 150 mA, VGG = −2.78 V typical to achieve IDDQ = 150 mA SUPPLY VOLTAGE VDD 24 28 32 V TA = 25°C, VDD = 28 V, IDDQ = 150 mA, and frequency range = 3.2 GHz to 3.8 GHz, unless otherwise noted.
Table 2. Parameter Symbol Min Typ Max Unit Test Conditions/Comments
FREQUENCY RANGE 3.2 3.8 GHz GAIN Small Signal Gain 30 33.5 dB Gain Flatness 1 dB RETURN LOSS Input 18 dB Output 10 dB POWER Output Power POUT 41.5 dBm PIN = 16 dBm 41.5 dBm PIN = 18 dBm Power Gain 24 dB PIN = 16 dBm 23.5 dB PIN = 18 dBm Power Added Efficiency PAE 52 % PIN = 16 dBm 55 % PIN = 18 dBm OUTPUT THIRD-ORDER INTERCEPT IP3 44 dBm POUT per tone = 30 dBm NOISE FIGURE NF 5 dB QUIESCENT CURRENT IDDQ 150 mA Adjust VGG from −5 V to 0 V to achieve IDDQ = 150 mA, VGG = −2.78 V typical to achieve IDDQ = 150 mA SUPPLY VOLTAGE VDD 24 28 32 V Rev. 0 | Page 3 of 17 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ELECTRICAL SPECIFICATIONS TOTAL SUPPLY CURRENT BY VDD ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS INTERFACE SCHEMATICS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION APPLICATIONS INFORMATION RECOMMENDED BIAS SEQUENCE During Power-Up During Power-Down TYPICAL APPLICATION CIRCUIT EVALUATION PCB OUTLINE DIMENSIONS ORDERING GUIDE