Datasheet AD8314 (Analog Devices) - 5
| 制造商 | Analog Devices |
| 描述 | 100 MHz to 2.7 GHz, 45 dB RF Detector/Controller |
| 页数 / 页 | 20 / 5 — Data Sheet. AD8314. PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS. RFIN. … |
| 修订版 | C |
| 文件格式/大小 | PDF / 528 Kb |
| 文件语言 | 英语 |
Data Sheet. AD8314. PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS. RFIN. VPOS. ENBL. V_DN. TOP VIEW. VSET. V_UP. (Not to Scale). FLTR 4. COMM
该数据表的模型线
文件文字版本
Data Sheet AD8314 PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS RFIN 1 8 VPOS ENBL AD8314 2 7 V_DN TOP VIEW VSET 3 6 V_UP (Not to Scale)
002
FLTR 4 5 COMM
01086- Figure 2. RM-8 Pin Configuration
RFIN 1 8 VPOS ENBL 2 7 V_DN AD8314 VSET 3 TOP VIEW 6 V_UP (Not to Scale) FLTR 4 5 COMM NOTES
003
1. EXPOSED PAD. THE EXPOSED PAD MUST BE CONNECTED TO GROUND.
01086- Figure 3. CP-8-23 Pin Configuration
Table 3. Pin Function Descriptions Pin No. Mnemonic Description
1 RFIN RF Input. 2 ENBL Connect Pin to VS for Normal Operation. Connect pin to ground for disable mode. 3 VSET Setpoint Input for Operation in Controller Mode. To operate in detector mode connect VSET to V_UP. 4 FLTR Connection for an External Capacitor to Slow the Response of the Output. Capacitor is connected between FLTR and V_UP. 5 COMM Device Common (Ground) 6 V_UP Logarithmic Output. Output voltage increases with increasing input amplitude. 7 V_DN Inversion of V_UP, Governed by: V_DN = 2.25 V − 2 × VUP. 8 VPOS Positive Supply Voltage (VS), 2.7 V to 5.5 V. EPAD Exposed Pad. Connect EPAD via a low impedance path to ground. CP-8-23 only. Rev. C | Page 5 of 20 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION INVERTED OUTPUT APPLICATIONS BASIC CONNECTIONS TRANSFER FUNCTION IN TERMS OF SLOPE AND INTERCEPT dBV VS. dBm FILTER CAPACITOR OPERATING IN CONTROLLER MODE POWER-ON AND ENABLE GLITCH INPUT COUPLING OPTIONS INCREASING THE LOGARITHMIC SLOPE IN MEASUREMENT MODE EFFECT OF WAVEFORM TYPE ON INTERCEPT MOBILE HANDSET POWER CONTROL EXAMPLES OPERATION AT 2.7 GHz USING THE LFCSP PACKAGE EVALUATION BOARD OUTLINE DIMENSIONS ORDERING GUIDE
002
FLTR 4 5 COMM
01086- Figure 2. RM-8 Pin Configuration
RFIN 1 8 VPOS ENBL 2 7 V_DN AD8314 VSET 3 TOP VIEW 6 V_UP (Not to Scale) FLTR 4 5 COMM NOTES
003
1. EXPOSED PAD. THE EXPOSED PAD MUST BE CONNECTED TO GROUND.
01086- Figure 3. CP-8-23 Pin Configuration
Table 3. Pin Function Descriptions Pin No. Mnemonic Description
1 RFIN RF Input. 2 ENBL Connect Pin to VS for Normal Operation. Connect pin to ground for disable mode. 3 VSET Setpoint Input for Operation in Controller Mode. To operate in detector mode connect VSET to V_UP. 4 FLTR Connection for an External Capacitor to Slow the Response of the Output. Capacitor is connected between FLTR and V_UP. 5 COMM Device Common (Ground) 6 V_UP Logarithmic Output. Output voltage increases with increasing input amplitude. 7 V_DN Inversion of V_UP, Governed by: V_DN = 2.25 V − 2 × VUP. 8 VPOS Positive Supply Voltage (VS), 2.7 V to 5.5 V. EPAD Exposed Pad. Connect EPAD via a low impedance path to ground. CP-8-23 only. Rev. C | Page 5 of 20 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION INVERTED OUTPUT APPLICATIONS BASIC CONNECTIONS TRANSFER FUNCTION IN TERMS OF SLOPE AND INTERCEPT dBV VS. dBm FILTER CAPACITOR OPERATING IN CONTROLLER MODE POWER-ON AND ENABLE GLITCH INPUT COUPLING OPTIONS INCREASING THE LOGARITHMIC SLOPE IN MEASUREMENT MODE EFFECT OF WAVEFORM TYPE ON INTERCEPT MOBILE HANDSET POWER CONTROL EXAMPLES OPERATION AT 2.7 GHz USING THE LFCSP PACKAGE EVALUATION BOARD OUTLINE DIMENSIONS ORDERING GUIDE