Datasheet AD8314 (Analog Devices) - 8
| 制造商 | Analog Devices |
| 描述 | 100 MHz to 2.7 GHz, 45 dB RF Detector/Controller |
| 页数 / 页 | 20 / 8 — AD8314. Data Sheet. AVERAGE: 128 SAMPLES. DN 500mV/VERTICAL. DN … |
| 修订版 | C |
| 文件格式/大小 | PDF / 528 Kb |
| 文件语言 | 英语 |
AD8314. Data Sheet. AVERAGE: 128 SAMPLES. DN 500mV/VERTICAL. DN 1V/VERTICAL. DIVISION. VUP 500mV/. VERTICAL. DN GND. GND
该数据表的模型线
文件文字版本
AD8314 Data Sheet AVERAGE: 128 SAMPLES AVERAGE: 128 SAMPLES V V DN 500mV/VERTICAL DN 1V/VERTICAL DIVISION DIVISION VUP 500mV/ V VERTICAL DN GND DIVISION GND 1µs PER HORIZONTAL DIVISION PULSED RF 0.1GHz, –13dBV VUP 500mV/VERTICAL DIVISION RF INPUT GND 100ns PER 200mV PER HORIZONTAL V V UP GND ENBL VERTICAL DIVISION DIVISION
019 016
5V PER VERTICAL DIVISION VENBL GND
01086- 01086- Figure 16. ENBL Response Time Figure 19. VUP and VDN Response Time, −40 dBm to 0 dBm
TRIG HP8648B 10MHz REF OUTPUT EXT TRIG HP8116A OUT HP8648B 10MHz REF OUTPUT EXT TRIG TRIG SIGNAL PULSE SIGNAL PICOSECOND OUT GENERATOR PULSE LABS GENERATOR GENERATOR PULSE PULSE MODE IN OUT PULSE MODULATION GENERATOR –33dBV RF OUT PULSE OUT MODE RF OUT 3.0V –3dB RF TEK P6204 0.1µF SPLITTER FET PROBE 1 RFIN VPOS 8 3.0V TRIG –3dB 0.1µF 52.3 TEK P6204 Ω 1 RFIN VPOS 8 2 ENBL V_DN 7 FET PROBE TEK TRIG AD8314 TDS784C 52.3Ω TEK P6204 SCOPE TEK P6204 3.0V 2 ENBL V_DN 7 3 VSET V_UP 6 FET PROBE TEK FET PROBE AD8314 TDS784C TEK P6204 SCOPE 3 VSET V_UP 6 NC 4 FLTR COMM 5 FET PROBE
017
NC 4 FLTR COMM 5 NC = NO CONNECT
01086- 020
NC = NO CONNECT
01086- Figure 17. Test Setup for ENBL Response Time Figure 20. Text Setup for Pulse Response
80 0 10 75 –10 RF INPUT –70dBm 70 –20 ) 65 –30 √Hz 60 –40 V/ 55 –50 –50dBm –60dBm ) ) Y (µ 50 –60 T 40d – Bm dB SI ( 45 –70 rees EN 40 –80 UDE Deg D L 1 IT 35 –90 A –20dBm L R P SE ( 30 –100 –30dBm A T AM 25 –110 PH 20 –120 15 –130 ISE SPEC 10 –140 O N 5 –150 0 –160 –5 –170 0.1 10 100 1k 10k 100k 1M 10M
018
100 1k 10k 100k 1M 10M
021
FREQUENCY (Hz) FREQUENCY (Hz)
01086- 01086- Figure 18. AC Response from VSET to V_DN Figure 21. VDN Noise Spectral Density Rev. C | Page 8 of 20 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION INVERTED OUTPUT APPLICATIONS BASIC CONNECTIONS TRANSFER FUNCTION IN TERMS OF SLOPE AND INTERCEPT dBV VS. dBm FILTER CAPACITOR OPERATING IN CONTROLLER MODE POWER-ON AND ENABLE GLITCH INPUT COUPLING OPTIONS INCREASING THE LOGARITHMIC SLOPE IN MEASUREMENT MODE EFFECT OF WAVEFORM TYPE ON INTERCEPT MOBILE HANDSET POWER CONTROL EXAMPLES OPERATION AT 2.7 GHz USING THE LFCSP PACKAGE EVALUATION BOARD OUTLINE DIMENSIONS ORDERING GUIDE
019 016
5V PER VERTICAL DIVISION VENBL GND
01086- 01086- Figure 16. ENBL Response Time Figure 19. VUP and VDN Response Time, −40 dBm to 0 dBm
TRIG HP8648B 10MHz REF OUTPUT EXT TRIG HP8116A OUT HP8648B 10MHz REF OUTPUT EXT TRIG TRIG SIGNAL PULSE SIGNAL PICOSECOND OUT GENERATOR PULSE LABS GENERATOR GENERATOR PULSE PULSE MODE IN OUT PULSE MODULATION GENERATOR –33dBV RF OUT PULSE OUT MODE RF OUT 3.0V –3dB RF TEK P6204 0.1µF SPLITTER FET PROBE 1 RFIN VPOS 8 3.0V TRIG –3dB 0.1µF 52.3 TEK P6204 Ω 1 RFIN VPOS 8 2 ENBL V_DN 7 FET PROBE TEK TRIG AD8314 TDS784C 52.3Ω TEK P6204 SCOPE TEK P6204 3.0V 2 ENBL V_DN 7 3 VSET V_UP 6 FET PROBE TEK FET PROBE AD8314 TDS784C TEK P6204 SCOPE 3 VSET V_UP 6 NC 4 FLTR COMM 5 FET PROBE
017
NC 4 FLTR COMM 5 NC = NO CONNECT
01086- 020
NC = NO CONNECT
01086- Figure 17. Test Setup for ENBL Response Time Figure 20. Text Setup for Pulse Response
80 0 10 75 –10 RF INPUT –70dBm 70 –20 ) 65 –30 √Hz 60 –40 V/ 55 –50 –50dBm –60dBm ) ) Y (µ 50 –60 T 40d – Bm dB SI ( 45 –70 rees EN 40 –80 UDE Deg D L 1 IT 35 –90 A –20dBm L R P SE ( 30 –100 –30dBm A T AM 25 –110 PH 20 –120 15 –130 ISE SPEC 10 –140 O N 5 –150 0 –160 –5 –170 0.1 10 100 1k 10k 100k 1M 10M
018
100 1k 10k 100k 1M 10M
021
FREQUENCY (Hz) FREQUENCY (Hz)
01086- 01086- Figure 18. AC Response from VSET to V_DN Figure 21. VDN Noise Spectral Density Rev. C | Page 8 of 20 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION INVERTED OUTPUT APPLICATIONS BASIC CONNECTIONS TRANSFER FUNCTION IN TERMS OF SLOPE AND INTERCEPT dBV VS. dBm FILTER CAPACITOR OPERATING IN CONTROLLER MODE POWER-ON AND ENABLE GLITCH INPUT COUPLING OPTIONS INCREASING THE LOGARITHMIC SLOPE IN MEASUREMENT MODE EFFECT OF WAVEFORM TYPE ON INTERCEPT MOBILE HANDSET POWER CONTROL EXAMPLES OPERATION AT 2.7 GHz USING THE LFCSP PACKAGE EVALUATION BOARD OUTLINE DIMENSIONS ORDERING GUIDE