Datasheet AD8306 (Analog Devices) - 2

AD8306–SPECIFICATIONS(VS = +5 V, TA = +25
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C, f = 10 MHz, unless otherwise noted) Parameter Conditions Min1 Typ Max1 Units
INPUT STAGE (Inputs INHI, INLO) Maximum Input2 Differential Drive, p-p ±3.5 ±4 V +9 dBV Equivalent Power in 50 Ω Terminated in 52.3 Ω储RIN +22 dBm Noise Floor Terminated 50 Ω Source 1.28 nV/√Hz Equivalent Power in 50 Ω 400 MHz Bandwidth –78 dBm Input Resistance From INHI to INLO 800 1000 1200 Ω Input Capacitance From INHI to INLO 2.5 pF DC Bias Voltage Either Input 1.725 V LIMITING AMPLIFIER (Outputs LMHI, LMLO) Usable Frequency Range 5 400 MHz At Limiter Output RLOAD = RLIM = 50 Ω, to –10 dB Point 585 MHz Phase Variation at 100 MHz Over Input Range –73 dBV to –3 dBV ±2 Degrees Limiter Output Current Nominally 400 mV/RLIM 0 1 10 mA Versus Temperature –40°C ≤ TA ≤ +85°C –0.008 %/°C Input Range3 –78 +9 dBV Maximum Output Voltage At Either LMHI or LMLO, wrt VPS2 1 1.25 V Rise/Fall Time (10%–90%) RLOAD = 50 Ω, 40 Ω ≤ RLIM ≤ 400 Ω 0.6 ns LOGARITHMIC AMPLIFIER (Output VLOG) ±3 dB Error Dynamic Range From Noise Floor to Maximum Input 100 dB Transfer Slope4 f = 10 MHz 19.5 20 20.5 mV/dB f = 100 MHz 19.6 mV/dB Over Temperature –40°C < TA < +85°C 19.3 20 20.7 mV/dB Intercept (Log Offset)4 f = 10 MHz –109.5 –108 –106.5 dBV f = 100 MHz –108.4 dBV Over Temperature –40°C ≤ TA ≤ +85°C –111 –108 –105 dBV Temperature Sensitivity –0.009 dB/°C Linearity Error (Ripple) Input from –80 dBV to +0 dBV ±0.4 dB Output Voltage Input = –91 dBV, VS = +5 V, +2.7 V 0.34 V Input = +9 dBV, VS = +5 V 2.34 2.75 V Input = –3 dBV, VS = +3 V 2.10 V Minimum Load Resistance, RL 40 50 Ω Maximum Sink Current To Ground 0.75 1.0 1.25 mA Output Resistance 0.3 Ω Small-Signal Bandwidth 3.5 MHz Output Settling Time to 2% Large Scale Input, +3 dBV, RL ≥␣ 50 Ω, CL ≤␣ 100 pF 120 220 ns Rise/Fall Time (10%–90%) Large Scale Input, +3 dBV, RL ≥␣ 50 Ω, CL ≤␣ 100 pF 73 100 ns POWER INTERFACES Supply Voltage, VS 2.7 5 6.5 V Quiescent Current Zero-Signal, LMDR Open 13 16 20 mA Over Temperature –40°C < TA < +85°C 11 16 23 mA Disable Current –40°C < TA < +85°C 0.01 4 µA Additional Bias for Limiter RLIM = 400 Ω (See Text) 2.0 2.25 mA Logic Level to Enable Power HI Condition, –40°C < TA < +85°C 2.7 VS V Input Current when HI 3 V at ENBL, –40°C < TA < +85°C 40 60 µA Logic Level to Disable Power LO Condition, –40°C < TA < +85°C –0.5 1 V TRANSISTOR COUNT # of Transistors 207 207 NOTES 1Minimum and maximum specified limits on parameters that are guaranteed but not tested are six sigma values. 2The input level is specified in “dBV” since logarithmic amplifiers respond strictly to voltage, not power. 0 dBV corresponds to a sinusoidal single-frequency input of 1 V rms. A power level of 0 dBm (1 mW) in a 50 Ω termination corresponds to an input of 0.2236 V rms. Hence, in the special case of 50 Ω termination, dBV values can be converted into dBm by adding a fixed offset of +13 to the dBV rms value. 3Due to the extremely high Gain Bandwidth Product of the AD8306, the output of either LMHI or LMLO will be unstable for levels below –78 dBV (–65 dBm, re 50 Ω). 4Standard deviation remains essentially constant over frequency. See Figures 13, 14, 16 and 17. Specifications subject to change without notice. –2– REV. A