Datasheet AD5560 (Analog Devices) - 6
| 制造商 | Analog Devices |
| 描述 | 1.2 A Programmable Device Power Supply with Integrated 16-Bit Level Setting DACs |
| 页数 / 页 | 66 / 6 — AD5560. Data Sheet. Parameter. Min. Typ. Max. Unit. Test … |
| 修订版 | E |
| 文件格式/大小 | PDF / 2.1 Mb |
| 文件语言 | 英语 |
AD5560. Data Sheet. Parameter. Min. Typ. Max. Unit. Test Conditions/Comments
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AD5560 Data Sheet Parameter Min Typ Max Unit Test Conditions/Comments
Measure Current Ranges Specified current ranges with VREF = 5 V and MI gain = 20, or with VREF = 2.5 V and MI gain = 5 ±5 µA Set using internal sense resistor ±25 µA Set using internal sense resistor ±250 µA Set using internal sense resistor ±2.5 mA Set using internal sense resistor ±25 mA Set using internal sense resistor ±500 mA EXTFORCE2, set by user with external sense resistor, limited by headroom requirements and maximum power dissipation ±1200 mA EXTFORCE1, set by user with external sense resistor, limited by headroom requirements and maximum power dissipation MEASURE CURRENT All offset DAC/supply combinations settings, all gain settings are measure current = (IDUT × RSENSE × MI gain), unless otherwise noted Differential Input Voltage Range1 −0.64 +0.64 V Maximum voltage across RSENSE, MI gain = 20 −0.7 +0.7 V Maximum voltage across RSENSE, MI gain = 10 Output Voltage Span1 25 V Measure current block alone (internal node) Offset Error −1 +1 % FSC At 0 A, MI gain = 20, MEASOUT gain = 1 Offset Error Tempco1 −1 ppm of FSC/°C Standard deviation = 13 ppm/°C Offset Error −1.5 +1.5 % FSC At 0 A, MI gain = 10, MEASOUT gain = 1 Offset Error Tempco1 −1 ppm of FSC/°C Standard deviation = 13 ppm/°C Offset Error −1.5 +1.5 % FSC At 0 A, MI gain = 20, MEASOUT gain = 0.2 Offset Error Tempco1 3 ppm of FSC/°C Standard deviation = 13 ppm/°C Offset Error −3 +3 % FSC At 0 A, MI gain = 10, MEASOUT gain = 0.2 Offset Error Tempco1 8 ppm of FSC/°C Standard deviation = 15 ppm/°C Gain Error −2 +2 % FSC Internal current ranges, all gain settings Gain Error1 −1 +1 % FSC External current ranges, excluding RSENSE Gain Error Tempco1 20 ppm/°C Standard deviation = 5 ppm/°C MEASOUT Gain = 1 All supply conditions Linearity Error −0.01 +0.01 % FSCR MI gain = 20 and 10 MEASOUT Gain = 0.2 Nominal supply (±16.5 V, 0x8000 offset DAC) Linearity Error −0.06 +0.06 % FSCR MI gain = 20 Linearity Error −0.05 +0.05 % FSCR MI gain = 10 MEASOUT Gain = 0.2 Low supply (−25 V/+8 V, 0xD4EB offset DAC) Linearity Error −0.125 +0.125 % FSCR MI gain = 20 Linearity Error −0.175 +0.175 % FSCR MI gain = 10 MEASOUT Gain = 0.2 High supply (−5 V/+28 V, 0xD1D offset DAC) Linearity Error −0.0875 +0.0875 % FSCR MI gain = 20 Linearity Error −0.1 +0.1 % FSCR MI gain = 10 Common-Mode Error −0.005 +0.005 %FSVR/V % of FS change at measure output per volts change in DUT voltage NSD1 900 nV/√Hz MI gain = 20, MEASOUT gain = 1, measured at MEASOUT at 1 kHz, inputs grounded 550 nV/√Hz MI gain = 10, MEASOUT gain = 1, measured at MEASOUT at 1 kHz, inputs grounded 170 nV/√Hz MI gain = 20, MEASOUT gain = 0.2, measured at MEASOUT at 1 kHz, inputs grounded 110 nV/√Hz MI gain = 10, MEASOUT gain = 0.2, measured at MEASOUT at 1 kHz, inputs grounded MEASURE VOLTAGE MEASOUT Gain 1 and MEASOUT Gain 0.2 Measure Voltage Range1 AVSS + 2.75 AVDD − 2.75 V All voltage ranges Gain Error −0.1 +0.1 % FS Gain Error Tempco1 3 ppm/°C Standard deviation = 2 ppm/°C MEASOUT Gain = 1 Linearity Error −2 +2 mV Offset Error −12 +12 mV Offset Error Tempco1 2 µV/°C Standard deviation = 12 µV/°C NSD1 100 nV/√Hz At 1 kHz, at MEASOUT, inputs grounded Rev. E | Page 6 of 66 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY FUNCTIONAL BLOCK DIAGRAM SPECIFICATIONS TIMING CHARACTERISTICS TIMING DIAGRAMS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TERMINOLOGY THEORY OF OPERATION FORCE AMPLIFIER HW_INH Function DAC REFERENCE VOLTAGE (VREF) OPEN-SENSE DETECT (OSD) ALARM AND CLAMP DEVICE UNDER TEST GROUND (DUTGND) DUTGND Kelvin Sense Kelvin Alarm (KELALM) GPO COMPARATORS CURRENT CLAMPS Clamp Alarm Function (CLALM) Clamp Enable Function (CLEN/LOAD) SHORT-CIRCUIT PROTECTION GUARD AMPLIFIER COMPENSATION CAPACITORS CURRENT RANGE SELECTION HIGH CURRENT RANGES Master and Slaves in Force Voltage (FV) Mode Master in FV Mode, Slaves in Force Current (FI) Mode IDEAL SEQUENCE FOR GANG MODE COMPENSATION FOR GANG MODE SYSTEM FORCE/SENSE SWITCHES DIE TEMPERATURE SENSOR AND THERMAL SHUTDOWN MEASURE OUTPUT (MEASOUT) VMID VOLTAGE FORCE AMPLIFIER STABILITY Safe Mode Autocompensation Mode Manual Compensation Mode POLES AND ZEROS IN A TYPICAL SYSTEM MINIMIZING THE NUMBER OF EXTERNAL COMPENSATION COMPONENTS CFx Pins CCx Pins EXTRA POLES AND ZEROS IN THE AD5560 The Effect of CCx The Effect of CFx The Effect of RZ The Effect of RP COMPENSATION STRATEGIES Ensuring Stability into an Unknown Capacitor Up to a Maximum Value OPTIMIZING PERFORMANCE FOR A KNOWN CAPACITOR USING AUTOCOMPENSATION MODE ADJUSTING THE AUTOCOMPENSATION MODE DEALING WITH PARALLEL LOAD CAPACITORS DAC LEVELS FORCE AND COMPARATOR DACS CLAMP DACS OSD DAC DUTGND DAC OFFSET DAC OFFSET AND GAIN REGISTERS Offset and Gain Registers for the Force Amplifier DAC Offset and Gain Registers for the Comparator DACs Offset and Gain Registers for the Clamp DACs REFERENCE SELECTION CALIBRATION Reducing Zero-Scale Error Reducing Gain Error Calibration Example ADDITIONAL CALIBRATION SYSTEM LEVEL CALIBRATION CHOOSING AVDD/AVSS POWER SUPPLY RAILS CHOOSING HCAVSSx AND HCAVDDx SUPPLY RAILS POWER DISSIPATION PACKAGE COMPOSITION AND MAXIMUM VERTICAL FORCE SLEW RATE CONTROL Programmable Slew Rate Ramp Function SERIAL INTERFACE SPI INTERFACE SPI WRITE MODE SDO OUTPUT FUNCTION BUSY FUNCTION LOAD FUNCTION REGISTER UPDATE RATES CONTROL REGISTERS DPS AND DAC ADDRESSING READBACK MODE DAC READBACK POWER-ON DEFAULT USING THE HCAVDDx AND HCAVSSx SUPPLIES POWER SUPPLY SEQUENCING REQUIRED EXTERNAL COMPONENTS POWER SUPPLY DECOUPLING APPLICATIONS INFORMATION THERMAL CONSIDERATIONS TEMPERATURE CONTOUR MAP ON THE TOP OF THE PACKAGE TQFP_EP Package BGA Package OUTLINE DIMENSIONS ORDERING GUIDE
AD5560 Data Sheet Parameter Min Typ Max Unit Test Conditions/Comments
Measure Current Ranges Specified current ranges with VREF = 5 V and MI gain = 20, or with VREF = 2.5 V and MI gain = 5 ±5 µA Set using internal sense resistor ±25 µA Set using internal sense resistor ±250 µA Set using internal sense resistor ±2.5 mA Set using internal sense resistor ±25 mA Set using internal sense resistor ±500 mA EXTFORCE2, set by user with external sense resistor, limited by headroom requirements and maximum power dissipation ±1200 mA EXTFORCE1, set by user with external sense resistor, limited by headroom requirements and maximum power dissipation MEASURE CURRENT All offset DAC/supply combinations settings, all gain settings are measure current = (IDUT × RSENSE × MI gain), unless otherwise noted Differential Input Voltage Range1 −0.64 +0.64 V Maximum voltage across RSENSE, MI gain = 20 −0.7 +0.7 V Maximum voltage across RSENSE, MI gain = 10 Output Voltage Span1 25 V Measure current block alone (internal node) Offset Error −1 +1 % FSC At 0 A, MI gain = 20, MEASOUT gain = 1 Offset Error Tempco1 −1 ppm of FSC/°C Standard deviation = 13 ppm/°C Offset Error −1.5 +1.5 % FSC At 0 A, MI gain = 10, MEASOUT gain = 1 Offset Error Tempco1 −1 ppm of FSC/°C Standard deviation = 13 ppm/°C Offset Error −1.5 +1.5 % FSC At 0 A, MI gain = 20, MEASOUT gain = 0.2 Offset Error Tempco1 3 ppm of FSC/°C Standard deviation = 13 ppm/°C Offset Error −3 +3 % FSC At 0 A, MI gain = 10, MEASOUT gain = 0.2 Offset Error Tempco1 8 ppm of FSC/°C Standard deviation = 15 ppm/°C Gain Error −2 +2 % FSC Internal current ranges, all gain settings Gain Error1 −1 +1 % FSC External current ranges, excluding RSENSE Gain Error Tempco1 20 ppm/°C Standard deviation = 5 ppm/°C MEASOUT Gain = 1 All supply conditions Linearity Error −0.01 +0.01 % FSCR MI gain = 20 and 10 MEASOUT Gain = 0.2 Nominal supply (±16.5 V, 0x8000 offset DAC) Linearity Error −0.06 +0.06 % FSCR MI gain = 20 Linearity Error −0.05 +0.05 % FSCR MI gain = 10 MEASOUT Gain = 0.2 Low supply (−25 V/+8 V, 0xD4EB offset DAC) Linearity Error −0.125 +0.125 % FSCR MI gain = 20 Linearity Error −0.175 +0.175 % FSCR MI gain = 10 MEASOUT Gain = 0.2 High supply (−5 V/+28 V, 0xD1D offset DAC) Linearity Error −0.0875 +0.0875 % FSCR MI gain = 20 Linearity Error −0.1 +0.1 % FSCR MI gain = 10 Common-Mode Error −0.005 +0.005 %FSVR/V % of FS change at measure output per volts change in DUT voltage NSD1 900 nV/√Hz MI gain = 20, MEASOUT gain = 1, measured at MEASOUT at 1 kHz, inputs grounded 550 nV/√Hz MI gain = 10, MEASOUT gain = 1, measured at MEASOUT at 1 kHz, inputs grounded 170 nV/√Hz MI gain = 20, MEASOUT gain = 0.2, measured at MEASOUT at 1 kHz, inputs grounded 110 nV/√Hz MI gain = 10, MEASOUT gain = 0.2, measured at MEASOUT at 1 kHz, inputs grounded MEASURE VOLTAGE MEASOUT Gain 1 and MEASOUT Gain 0.2 Measure Voltage Range1 AVSS + 2.75 AVDD − 2.75 V All voltage ranges Gain Error −0.1 +0.1 % FS Gain Error Tempco1 3 ppm/°C Standard deviation = 2 ppm/°C MEASOUT Gain = 1 Linearity Error −2 +2 mV Offset Error −12 +12 mV Offset Error Tempco1 2 µV/°C Standard deviation = 12 µV/°C NSD1 100 nV/√Hz At 1 kHz, at MEASOUT, inputs grounded Rev. E | Page 6 of 66 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY FUNCTIONAL BLOCK DIAGRAM SPECIFICATIONS TIMING CHARACTERISTICS TIMING DIAGRAMS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TERMINOLOGY THEORY OF OPERATION FORCE AMPLIFIER HW_INH Function DAC REFERENCE VOLTAGE (VREF) OPEN-SENSE DETECT (OSD) ALARM AND CLAMP DEVICE UNDER TEST GROUND (DUTGND) DUTGND Kelvin Sense Kelvin Alarm (KELALM) GPO COMPARATORS CURRENT CLAMPS Clamp Alarm Function (CLALM) Clamp Enable Function (CLEN/LOAD) SHORT-CIRCUIT PROTECTION GUARD AMPLIFIER COMPENSATION CAPACITORS CURRENT RANGE SELECTION HIGH CURRENT RANGES Master and Slaves in Force Voltage (FV) Mode Master in FV Mode, Slaves in Force Current (FI) Mode IDEAL SEQUENCE FOR GANG MODE COMPENSATION FOR GANG MODE SYSTEM FORCE/SENSE SWITCHES DIE TEMPERATURE SENSOR AND THERMAL SHUTDOWN MEASURE OUTPUT (MEASOUT) VMID VOLTAGE FORCE AMPLIFIER STABILITY Safe Mode Autocompensation Mode Manual Compensation Mode POLES AND ZEROS IN A TYPICAL SYSTEM MINIMIZING THE NUMBER OF EXTERNAL COMPENSATION COMPONENTS CFx Pins CCx Pins EXTRA POLES AND ZEROS IN THE AD5560 The Effect of CCx The Effect of CFx The Effect of RZ The Effect of RP COMPENSATION STRATEGIES Ensuring Stability into an Unknown Capacitor Up to a Maximum Value OPTIMIZING PERFORMANCE FOR A KNOWN CAPACITOR USING AUTOCOMPENSATION MODE ADJUSTING THE AUTOCOMPENSATION MODE DEALING WITH PARALLEL LOAD CAPACITORS DAC LEVELS FORCE AND COMPARATOR DACS CLAMP DACS OSD DAC DUTGND DAC OFFSET DAC OFFSET AND GAIN REGISTERS Offset and Gain Registers for the Force Amplifier DAC Offset and Gain Registers for the Comparator DACs Offset and Gain Registers for the Clamp DACs REFERENCE SELECTION CALIBRATION Reducing Zero-Scale Error Reducing Gain Error Calibration Example ADDITIONAL CALIBRATION SYSTEM LEVEL CALIBRATION CHOOSING AVDD/AVSS POWER SUPPLY RAILS CHOOSING HCAVSSx AND HCAVDDx SUPPLY RAILS POWER DISSIPATION PACKAGE COMPOSITION AND MAXIMUM VERTICAL FORCE SLEW RATE CONTROL Programmable Slew Rate Ramp Function SERIAL INTERFACE SPI INTERFACE SPI WRITE MODE SDO OUTPUT FUNCTION BUSY FUNCTION LOAD FUNCTION REGISTER UPDATE RATES CONTROL REGISTERS DPS AND DAC ADDRESSING READBACK MODE DAC READBACK POWER-ON DEFAULT USING THE HCAVDDx AND HCAVSSx SUPPLIES POWER SUPPLY SEQUENCING REQUIRED EXTERNAL COMPONENTS POWER SUPPLY DECOUPLING APPLICATIONS INFORMATION THERMAL CONSIDERATIONS TEMPERATURE CONTOUR MAP ON THE TOP OF THE PACKAGE TQFP_EP Package BGA Package OUTLINE DIMENSIONS ORDERING GUIDE