Datasheet AD5751 (Analog Devices) - 3

Data Sheet AD5751 FUNCTIONAL BLOCK DIAGRAM DVCC GND AVDD GND COMP1 COMP2 CLEAR CLRSEL VSENSE+ INPUT SHIFT SCLK/OUTEN * REGISTER SDIN/R0 * VOUT RANGE AND VOUT SYNC/RSET * SCALING CONTROL SDO/ VOUT VFAULT * LOGIC SHORT FAULT HW SELECT STATUS REGISTER AVDD VIN R3 VREF R2 RESET IOUT RANGE SCALING IOUT OVERTEMP REXT1 FAULT/TEMP * VOUT SHORT FAULT RSET REXT2 IOUT OPEN FAULT NC/IFAULT * POWER- IOUT AD5751 ON RESET OPEN FAULT AD2/R1 * AD1/R2 * AD0/R3 * *
1
DENOTES SHARED PIN. SOFTWARE MODE DENOTED BY REGULAR TEXT, HARDWARE MODE
00
DENOTED BY ITALIC TEXT. FOR EXAMPLE, FOR FAULT/TEMP PIN, IN SOFTWARE MODE, THIS
9- 26
PIN TAKES ON FAULT FUNCTION. IN HARDWARE MODE, THIS PIN TAKES ON TEMP FUNCTION.
07 Figure 1. Functional Block Diagram Rev. E | Page 3 of 32 Document Outline Features Applications General Description Revision History Functional Block Diagram Specifications Timing Characteristics Timing Diagrams Absolute Maximum Ratings ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Current Output Terminology Theory of Operation Software Mode Currrent Output Architecture Driving Inductive Loads Voltage Output Amplifier Driving Large Capacitive Loads Power-On State of the AD5751 Default Registers at Power-On Reset Function OUTEN Software Control Input Shift Register Readback Operation Hardware Control Transfer Function Detailed Description of Features Output Fault Alert—Software Mode Output Fault Alert—Hardware Mode Voltage Output Short-Circuit Protection Asynchronous Clear (CLEAR) External Current Setting Resistor Programmable Overrange Modes Packet Error Checking Applications Information Transient Voltage Protection Thermal Considerations Layout Guidelines Galvanically Isolated Interface Microprocessor Interfacing Outline Dimensions Ordering Guide