Datasheet AD5751 (Analog Devices) - 8

AD5751 Data Sheet SCLK SYNC t11 SDIN A2 A1 A0 R = 1 0 X X X X X X X X X X X t12 SDO X X X X X R3 R2 R1 R0 CLRSEL OUTEN RSET PEC OVER IOUT VOUT
004
ERROR TEMP FAULT FAULT
9- 0726 Figure 3. Readback Mode Timing Diagram Rev. E | Page 8 of 32 Document Outline Features Applications General Description Revision History Functional Block Diagram Specifications Timing Characteristics Timing Diagrams Absolute Maximum Ratings ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Current Output Terminology Theory of Operation Software Mode Currrent Output Architecture Driving Inductive Loads Voltage Output Amplifier Driving Large Capacitive Loads Power-On State of the AD5751 Default Registers at Power-On Reset Function OUTEN Software Control Input Shift Register Readback Operation Hardware Control Transfer Function Detailed Description of Features Output Fault Alert—Software Mode Output Fault Alert—Hardware Mode Voltage Output Short-Circuit Protection Asynchronous Clear (CLEAR) External Current Setting Resistor Programmable Overrange Modes Packet Error Checking Applications Information Transient Voltage Protection Thermal Considerations Layout Guidelines Galvanically Isolated Interface Microprocessor Interfacing Outline Dimensions Ordering Guide