Datasheet ADP5054 (Analog Devices) - 4

ADP5054 Data Sheet DETAILED FUNCTIONAL BLOCK DIAGRAM CHANNEL 1—BUCK UVLO1 PVIN1 0.8V – + EN1 + ACS1 – 1MΩ VREG HICCUP AND BST1 Q1 LATCH-UP CLK1 OCP DRIVER SLOPE SW1 COMP + E CMP1 – CONTROL LOGIC COMP1 VREG CH AND MOSFET HARG IT C DRIVER WITH SW 0.8V S + DI CLK1 ANTICROSS EA1 DRIVER DL1 FB1 – PROTECTION PGND FREQ FOLDBACK ZERO CROSS VID1 + CURRENT LIMIT SELECTION 0.72V – PWRGD1 CURRENT BALANCE EN2 CHANNEL 2—BUCK PVIN2 COMP2 DUPLICATE BST2 CHANNEL 1 DL2 FB2 SW2 RT OSCILLATOR SYNC/MODE VREG PVIN1 VREG CFG12 FUNCTION INTERNAL HOUSE-KEEPING DECODER LOGIC POWER-ON REGULATOR CFG34 RESET VDD PWRGD CHANNEL 3—BUCK UVLO3 PVIN3 0.8V – + EN3 + ACS3 – 1MΩ VREG HICCUP AND BST3 Q3 LATCH-UP CLK3 OCP DRIVER SLOPE SW3 COMP + CMP3 VREG Q4 – CONTROL LOGIC COMP3 AND MOSFET DRIVER WITH 0.8V + DRIVER CLK3 ANTICROSS EA3 FB3 – PROTECTION PGND3 FREQ ZERO E FOLDBACK G CROSS R CH HA IT C S SW DI VID3 + 0.72V – PWRGD3 CURRENT BALANCE EN4 CHANNEL 4—BUCK PVIN4 COMP4 DUPLICATE BST4 CHANNEL 3 SW4 FB4
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PGND4
-00 617 12 Figure 2. Rev. G | Page 4 of 31 Document Outline FEATURES APPLICATIONS TYPICAL APPLICATION CIRCUIT GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY DETAILED FUNCTIONAL BLOCK DIAGRAM SPECIFICATIONS BUCK REGULATOR SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION BUCK REGULATOR OPERATIONAL MODES PWM Mode PSM Mode Forced PWM and Automatic PWM/PSM Modes ADJUSTABLE AND FIXED OUTPUT VOLTAGE INTERNAL REGULATORS (VREG AND VDD) SEPARATE SUPPLY APPLICATIONS LOW-SIDE DEVICE SELECTION BOOTSTRAP CIRCUITRY ACTIVE OUTPUT DISCHARGE SWITCH PRECISION ENABLING OSCILLATOR Phase Shift SYNCHRONIZATION INPUT/OUTPUT SOFT START PARALLEL OPERATION STARTUP WITH PRECHARGED OUTPUT CURRENT-LIMIT PROTECTION FREQUENCY FOLDBACK PULSE SKIP IN MAXIMUM DUTY SHORT-CIRCUIT PROTECTION (SCP) LATCH-OFF PROTECTION Short-Circuit Latch-Off Mode UNDERVOLTAGE LOCKOUT (UVLO) POWER-GOOD FUNCTION THERMAL SHUTDOWN APPLICATIONS INFORMATION ADIsimPOWER DESIGN TOOL PROGRAMMING THE OUTPUT VOLTAGE VOLTAGE CONVERSION LIMITATIONS CURRENT-LIMIT SETTING SOFT START SETTING INDUCTOR SELECTION OUTPUT CAPACITOR SELECTION INPUT CAPACITOR SELECTION LOW-SIDE POWER DEVICE SELECTION PROGRAMMING THE UVLO INPUT COMPENSATION COMPONENTS DESIGN POWER DISSIPATION Buck Regulator Power Dissipation Power Switch Conduction Loss (PCOND) Switching Loss (PSW) Transition Loss (PTRAN) Thermal Shutdown JUNCTION TEMPERATURE DESIGN EXAMPLES SETTING THE SWITCHING FREQUENCY SETTING THE OUTPUT VOLTAGE SETTING THE CURRENT LIMIT SELECTING THE INDUCTOR SELECTING THE OUTPUT CAPACITOR SELECTING THE LOW-SIDE MOSFET DESIGNING THE COMPENSATION NETWORK SELECTING THE SOFT START TIME SELECTING THE INPUT CAPACITOR PRINTED CIRCUIT BOARD LAYOUT RECOMMENDATIONS TYPICAL APPLICATION CIRCUIT FACTORY DEFAULT OPTIONS OUTLINE DIMENSIONS ORDERING GUIDE