Datasheet ADP5054 (Analog Devices) - 9

Data Sheet ADP5054 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS E D O 3 M/ 1 P G C P 1 1 3 M 3 E N D 1 M 1 NI NI N O B R Y D T B O N V V E C F V S V R F C E P P 8 7 6 5 4 3 2 1 0 9 8 7 4 4 4 4 4 4 4 4 4 3 3 3 BST3 1 36 PVIN1 PGND3 2 35 SW1 PGND3 3 34 SW1 SW3 4 33 SW1 SW3 5 32 BST1 PVIN3 6 ADP5054 31 DL1 PVIN4 7 TOP VIEW 30 PGND (Not to Scale) SW4 8 29 DL2 SW4 9 28 BST2 PGND4 10 27 SW2 PGND4 11 26 SW2 BST4 12 25 SW2 3 4 5 6 7 8 9 0 1 2 3 4 1 1 1 1 1 1 1 2 2 2 2 2 4 4 4 4 D 2 2 2 2 2 2 2 3 N P B 1 B P G N N N N I I I G E M F G F R M E V V V F F O O P P P C W C C C P NOTES
003
1. THE EXPOSED PAD MUST BE CONNECTED AND SOLDERED TO AN EXTERNAL GROUND PLANE.
12617- Figure 3. Pin Configuration
Table 6. Pin Function Descriptions Pin No. Mnemonic Description
1 BST3 High-Side FET Driver Power Supply for Channel 3. 2, 3 PGND3 Power Ground for Channel 3. 4, 5 SW3 Switching Node Output for Channel 3. 6 PVIN3 Power Input for Channel 3. Connect a bypass capacitor between this pin and ground. 7 PVIN4 Power Input for Channel 4. Connect a bypass capacitor between this pin and ground. 8, 9 SW4 Switching Node Output for Channel 4. 10, 11 PGND4 Power Ground for Channel 4. 12 BST4 High-Side FET Driver Power Supply for Channel 4. 13 CFG34 Connect a resistor divider from this pin to VREG and ground to configure the different functionalities for Channel 3 and Channel 4, including the soft start timer, ½× frequency, parallel operation, and SYNC clock output features. 14 EN4 Enable Input for Channel 4. Use an external resistor divider to set the turn-on threshold. 15 COMP4 Error Amplifier Output for Channel 4. Connect an RC network from this pin to ground. 16 FB4 Feedback Sensing Input for Channel 4. 17 PWRGD Power-Good Signal Output. This open-drain output is the power-good signal for the selected channels. 18 CFG12 Connect a resistor divider from this pin to VREG and ground to configure the different functionalities for Channel 1 and Channel 2, including the soft start timer, ½× frequency, and parallel operation features. 19 FB2 Feedback Sensing Input for Channel 2. 20 COMP2 Error Amplifier Output for Channel 2. Connect an RC network from this pin to ground. 21 EN2 Enable Input for Channel 2. Use an external resistor divider to set the turn-on threshold. 22, 23, 24 PVIN2 Power Input for Channel 2. Connect a bypass capacitor between this pin and ground. 25, 26, 27 SW2 Switching Node Output for Channel 2. 28 BST2 High-Side FET Driver Power Supply for Channel 2. 29 DL2 Low-Side FET Gate Driver for Channel 2. Connect a resistor from this pin to ground to program the current-limit threshold for Channel 2. 30 PGND Power Ground for Channel 1 and Channel 2. 31 DL1 Low-Side FET Gate Driver for Channel 1. Connect a resistor from this pin to ground to program the current-limit threshold for Channel 1. 32 BST1 High-Side FET Driver Power Supply for Channel 1. 33, 34, 35 SW1 Switching Node Output for Channel 1. 36, 37, 38 PVIN1 Power Input for the Internal Linear Regulator and the Channel 1 Buck Regulator. Connect a bypass capacitor between this pin and ground. Rev. G | Page 9 of 31 Document Outline FEATURES APPLICATIONS TYPICAL APPLICATION CIRCUIT GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY DETAILED FUNCTIONAL BLOCK DIAGRAM SPECIFICATIONS BUCK REGULATOR SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION BUCK REGULATOR OPERATIONAL MODES PWM Mode PSM Mode Forced PWM and Automatic PWM/PSM Modes ADJUSTABLE AND FIXED OUTPUT VOLTAGE INTERNAL REGULATORS (VREG AND VDD) SEPARATE SUPPLY APPLICATIONS LOW-SIDE DEVICE SELECTION BOOTSTRAP CIRCUITRY ACTIVE OUTPUT DISCHARGE SWITCH PRECISION ENABLING OSCILLATOR Phase Shift SYNCHRONIZATION INPUT/OUTPUT SOFT START PARALLEL OPERATION STARTUP WITH PRECHARGED OUTPUT CURRENT-LIMIT PROTECTION FREQUENCY FOLDBACK PULSE SKIP IN MAXIMUM DUTY SHORT-CIRCUIT PROTECTION (SCP) LATCH-OFF PROTECTION Short-Circuit Latch-Off Mode UNDERVOLTAGE LOCKOUT (UVLO) POWER-GOOD FUNCTION THERMAL SHUTDOWN APPLICATIONS INFORMATION ADIsimPOWER DESIGN TOOL PROGRAMMING THE OUTPUT VOLTAGE VOLTAGE CONVERSION LIMITATIONS CURRENT-LIMIT SETTING SOFT START SETTING INDUCTOR SELECTION OUTPUT CAPACITOR SELECTION INPUT CAPACITOR SELECTION LOW-SIDE POWER DEVICE SELECTION PROGRAMMING THE UVLO INPUT COMPENSATION COMPONENTS DESIGN POWER DISSIPATION Buck Regulator Power Dissipation Power Switch Conduction Loss (PCOND) Switching Loss (PSW) Transition Loss (PTRAN) Thermal Shutdown JUNCTION TEMPERATURE DESIGN EXAMPLES SETTING THE SWITCHING FREQUENCY SETTING THE OUTPUT VOLTAGE SETTING THE CURRENT LIMIT SELECTING THE INDUCTOR SELECTING THE OUTPUT CAPACITOR SELECTING THE LOW-SIDE MOSFET DESIGNING THE COMPENSATION NETWORK SELECTING THE SOFT START TIME SELECTING THE INPUT CAPACITOR PRINTED CIRCUIT BOARD LAYOUT RECOMMENDATIONS TYPICAL APPLICATION CIRCUIT FACTORY DEFAULT OPTIONS OUTLINE DIMENSIONS ORDERING GUIDE