Datasheet ADP5134 (Analog Devices)
| 制造商 | Analog Devices |
| 描述 | Dual 3 MHz, 1200 mA Buck Regulators and Two 300 mA LDO Regulators With Precision Enable and Power-Good Output |
| 页数 / 页 | 28 / 1 — Dual 3 MHz, 1200 mA Buck Regulators and Two 300 mA LDO. Regulators With … |
| 修订版 | A |
| 文件格式/大小 | PDF / 883 Kb |
| 文件语言 | 英语 |
Dual 3 MHz, 1200 mA Buck Regulators and Two 300 mA LDO. Regulators With Precision Enable and Power-Good Output. Data Sheet
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Dual 3 MHz, 1200 mA Buck Regulators and Two 300 mA LDO Regulators With Precision Enable and Power-Good Output Data Sheet ADP5134 FEATURES TYPICAL APPLICATION CIRCUIT Main input voltage range of 2.5 V to 5.5 V VOUT1 10 Two 1200 mA buck regulators and two 300 mA LDO regulators V L1 1µH IN VIN1 SW1 2.5V TO 16 C1 15 24-lead, 4 mm × 4 mm LFCSP package 5.5V FB1 R1 4.7µF BUCK1 1.2A 11 C2 R2 Regulator accuracy of ±1.8% ON EN1 PGND1 10µF OFF 12 14 PWM Factory programmable or external adjustable VOUTx MODE 13 PSM/PWM Precision enable pins for easier power sequencing VOUT2 VIN2 MODE 9 3 L2 1µH C3 SW2 Factory selectable power-good pin 4.7µF BUCK2 4 1.2A FB2 R3 8 3 MHz buck operation with forced PWM and automatic ON EN2 C4 OFF R4 7 PGND2 10µF 5 PWM/PSM modes AVIN 17 HOUSEKEEPING BUCK1/BUCK2: output voltage range from 0.8 V to 3.8 V C5 V 0.1µF INLDO1 VIN3 LDO1/LDO2: output voltage range from 0.8 V to 5.2 V 1.7V TO 21 5.5V C6 VOUT3 1µF LDO1 20 FB3 R5 LDO1/LDO2: input voltage range from 1.7 V to 5.5 V 300mA ON 19 C7 EN3 OFF 22 R6 1µF LDO1/LDO2: high PSRR and low output noise VINLDO2 VIN4 1.7V TO 23 VOUT4 APPLICATIONS 5.5V C8 1µF LDO2 24 300mA FB4 R7 1 C9 ON EN4 2 1µF Power for processors, application specific integrated circuits OFF R8 (ASICs), field programmable gate arrays (FPGAs), and VDDIO radio frequency (RF) chipsets POWER GOOD R1 PG 100kΩ Portable instrumentation and medical devices 6 ADP5134 Space constrained devices 18
001
AGND
11710- Figure 1.
GENERAL DESCRIPTION
The ADP5134 combines two high performance buck regulators Regulators in the ADP5134 are activated through dedicated and two low dropout (LDO) regulators. It is available in a 24-lead enable pins. The default output voltages can be externally set in 4 mm × 4 mm LFCSP. the adjustable version or factory programmable to a wide range The high switching frequency of the buck regulators enables tiny of preset values in the fixed voltage version. multilayer external components and minimizes the board space.
Table 1. Family Models
When the MODE pin is set to high, the buck regulators operate in
Maximum
forced pulse-width modulation (PWM) mode. When the MODE
Model Channels Current Package
pin is set to low, the buck regulators operate in PWM mode ADP5023 2 Bucks, 1 LDO 800 mA, 300 mA LFCSP (CP-24-10) when the load is above a predefined threshold. When the load ADP5024 2 Bucks, 1 LDO 1.2 A, 300 mA LFCSP (CP-24-10) current falls below a predefined threshold, the regulator operates ADP5034 2 Bucks, 2 LDOs 1.2 A, 300 mA LFCSP (CP-24-10), in power save mode (PSM), improving the light load efficiency. TSSOP (RE-28-1) ADP5037 2 Bucks, 2 LDOs 800 mA, 300 mA LFCSP (CP-24-10) The two buck regulators operate out of phase to reduce the input ADP5033 2 Bucks, 2 LDOs 800 mA, 300 mA WLCSP (CB-16-8) capacitor requirement. The low quiescent current, low dropout with 2 ENx pins voltage, and wide input voltage range of the ADP5134 LDO ADP5040 1 Bucks, 2 LDOs 1.2 A, 300 mA LFCSP (CP-20-10) regulators extend the battery life of portable devices. The ADP5041 1 Bucks, 2 LDOs 1.2 A, 300 mA LFCSP (CP-20-10) ADP5134 LDO regulators maintain power supply rejection with supervisory greater than 60 dB for frequencies as high as 10 kHz while circuit, watchdog function, and operating with a low headroom voltage of 500 mV. manual reset
Rev. A Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Tel: 781.329.4700 ©2013–2017 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. Technical Support www.analog.com
Document Outline FEATURES APPLICATIONS TYPICAL APPLICATION CIRCUIT GENERAL DESCRIPTION REVISION HISTORY SPECIFICATIONS GENERAL SPECIFICATIONS BUCK1 AND BUCK2 SPECIFICATIONS LDO1 AND LDO2 SPECIFICATIONS INPUT AND OUTPUT CAPACITOR, RECOMMENDED SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION POWER MANAGEMENT UNIT Power-Good Output Thermal Protection Undervoltage Lockout Precision Enable and Shutdown Control BUCK1 AND BUCK2 Control Scheme PWM Mode Power Save Mode (PSM) PSM Current Threshold Oscillator and Phasing of Inductor Switching Short-Circuit Protection Buck Regulator Soft Start Current Limit 100% Duty Operation Active Pull-Down Resistors LDO1 AND LDO2 LDO Regulator Soft Start APPLICATIONS INFORMATION BUCK REGULATOR EXTERNAL COMPONENT SELECTION Feedback Resistors Inductor Output Capacitor Input Capacitor LDO REGULATOR EXTERNAL COMPONENT SELECTION Feedback Resistors Output Capacitor Input Bypass Capacitor Input and Output Capacitor Properties POWER DISSIPATION AND THERMAL CONSIDERATIONS BUCK REGULATOR POWER DISSIPATION LDO Regulator Power Dissipation JUNCTION TEMPERATURE PCB LAYOUT GUIDELINES TYPICAL APPLICATION SCHEMATICS BILL OF MATERIALS OUTLINE DIMENSIONS ORDERING GUIDE
001
AGND
11710- Figure 1.
GENERAL DESCRIPTION
The ADP5134 combines two high performance buck regulators Regulators in the ADP5134 are activated through dedicated and two low dropout (LDO) regulators. It is available in a 24-lead enable pins. The default output voltages can be externally set in 4 mm × 4 mm LFCSP. the adjustable version or factory programmable to a wide range The high switching frequency of the buck regulators enables tiny of preset values in the fixed voltage version. multilayer external components and minimizes the board space.
Table 1. Family Models
When the MODE pin is set to high, the buck regulators operate in
Maximum
forced pulse-width modulation (PWM) mode. When the MODE
Model Channels Current Package
pin is set to low, the buck regulators operate in PWM mode ADP5023 2 Bucks, 1 LDO 800 mA, 300 mA LFCSP (CP-24-10) when the load is above a predefined threshold. When the load ADP5024 2 Bucks, 1 LDO 1.2 A, 300 mA LFCSP (CP-24-10) current falls below a predefined threshold, the regulator operates ADP5034 2 Bucks, 2 LDOs 1.2 A, 300 mA LFCSP (CP-24-10), in power save mode (PSM), improving the light load efficiency. TSSOP (RE-28-1) ADP5037 2 Bucks, 2 LDOs 800 mA, 300 mA LFCSP (CP-24-10) The two buck regulators operate out of phase to reduce the input ADP5033 2 Bucks, 2 LDOs 800 mA, 300 mA WLCSP (CB-16-8) capacitor requirement. The low quiescent current, low dropout with 2 ENx pins voltage, and wide input voltage range of the ADP5134 LDO ADP5040 1 Bucks, 2 LDOs 1.2 A, 300 mA LFCSP (CP-20-10) regulators extend the battery life of portable devices. The ADP5041 1 Bucks, 2 LDOs 1.2 A, 300 mA LFCSP (CP-20-10) ADP5134 LDO regulators maintain power supply rejection with supervisory greater than 60 dB for frequencies as high as 10 kHz while circuit, watchdog function, and operating with a low headroom voltage of 500 mV. manual reset
Rev. A Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Tel: 781.329.4700 ©2013–2017 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. Technical Support www.analog.com
Document Outline FEATURES APPLICATIONS TYPICAL APPLICATION CIRCUIT GENERAL DESCRIPTION REVISION HISTORY SPECIFICATIONS GENERAL SPECIFICATIONS BUCK1 AND BUCK2 SPECIFICATIONS LDO1 AND LDO2 SPECIFICATIONS INPUT AND OUTPUT CAPACITOR, RECOMMENDED SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION POWER MANAGEMENT UNIT Power-Good Output Thermal Protection Undervoltage Lockout Precision Enable and Shutdown Control BUCK1 AND BUCK2 Control Scheme PWM Mode Power Save Mode (PSM) PSM Current Threshold Oscillator and Phasing of Inductor Switching Short-Circuit Protection Buck Regulator Soft Start Current Limit 100% Duty Operation Active Pull-Down Resistors LDO1 AND LDO2 LDO Regulator Soft Start APPLICATIONS INFORMATION BUCK REGULATOR EXTERNAL COMPONENT SELECTION Feedback Resistors Inductor Output Capacitor Input Capacitor LDO REGULATOR EXTERNAL COMPONENT SELECTION Feedback Resistors Output Capacitor Input Bypass Capacitor Input and Output Capacitor Properties POWER DISSIPATION AND THERMAL CONSIDERATIONS BUCK REGULATOR POWER DISSIPATION LDO Regulator Power Dissipation JUNCTION TEMPERATURE PCB LAYOUT GUIDELINES TYPICAL APPLICATION SCHEMATICS BILL OF MATERIALS OUTLINE DIMENSIONS ORDERING GUIDE