Datasheet SLG46811 (Dialog Semiconductor) - 6
| 制造商 | Dialog Semiconductor |
| 描述 | GreenPAK Programmable Mixed-signal Matrix |
| 页数 / 页 | 168 / 6 — SLG46811. GreenPAK Programmable Mixed-Signal Matrix Preliminary Tables. … |
| 文件格式/大小 | PDF / 2.3 Mb |
| 文件语言 | 英语 |
SLG46811. GreenPAK Programmable Mixed-Signal Matrix Preliminary Tables. Table 1: Functional Pin Description.8
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SLG46811
GreenPAK Programmable Mixed-Signal Matrix Preliminary Tables
Table 1: Functional Pin Description.8
Table 2: Pin Type Definitions .10
Table 3: Absolute Maximum Ratings.11
Table 4: Electrostatic Discharge Ratings .11
Table 5: Recommended Operating Conditions .11
Table 6: EC at T = -40 °C to +85 °C, VDD = 2.3 V to 5.5 V Unless Otherwise Noted .12
Table 7: EC of the SDA and SCL IO stages at T = -40 °C to +85 °C, VDD = 2.3 V to 5.5 V Unless Otherwise Noted.14
Table 8: I2C Bus Timing Characteristics at T = -40 °C to +85 °C, VDD = 2.3 V to 5.5 V Unless Otherwise Noted .15
Table 9: Typical Current Estimated for Each Macrocell at T = -40 °C to +85 °C .15
Table 10: Typical Delay Estimated for Each Macrocell at T = 25 °C.16
Table 11: Programmable Delay Expected Delays and Widths (Typical) at T = 25 °C .17
Table 12: Typical Filter Rejection Pulse Width at T = 25 °C .17
Table 13: Typical Counter/Delay Offset at T = 25 °C .18
Table 14: Oscillators Frequency Limits, VDD = 2.3 V to 5.5 V.18
Table 15: Oscillators Power-On Delay at T = -40 °C to +85 °C, OSC Power Setting: "Auto Power-On" .18
Table 16: MS ACMP Specifications at T = -40 °C to +85 °C, VDD = 2.3 V to 5.5 V Unless Otherwise Noted .19
Table 17: Vref vs Temperature .21
Table 18: Matrix Input Table.31
Table 19: Matrix Output Table.33
Table 20: Connection Matrix Virtual Inputs .35
Table 21: 2-bit LUT2_0 to 2-bit LUT2_1 Truth Table .38
Table 22: 2-bit LUT Standard Digital Functions .38
Table 23: 2-bit LUT2_2 Truth Table .40
Table 24: 2-bit LUT Standard Digital Functions .40
Table 25: 3-bit LUT3_0 to 3-bit LUT3_9 Truth Table .47
Table 26: 3-bit LUT Standard Digital Functions .47
Table 27: 4-bit LUT0 Truth Table .51
Table 28: 4-bit LUT Standard Digital Functions .52
Table 29: 3-bit LUT8 Truth Table .60
Table 30: 3-bit LUT9 Truth Table .60
Table 31: 3-bit LUT10 Truth Table .60
Table 32: 3-bit LUT11 Truth Table .60
Table 33: 3-bit LUT12 Truth Table .60
Table 34: 3-bit LUT13 Truth Table .60
Table 35: Vref Selection Table.78
Table 36: Oscillator Control Input Modes .79
Table 37: Oscillator Operation Mode Configuration Settings .79
Table 38: Read/Write Protection Options.96
Table 39: Register Map.102
Table 40: MSL Classification.161 Datasheet
CFR0011-120-00 Revision 2.2
6 of 168 3-Feb-2021
© 2021 Dialog Semiconductor
GreenPAK Programmable Mixed-Signal Matrix Preliminary Tables
Table 1: Functional Pin Description.8
Table 2: Pin Type Definitions .10
Table 3: Absolute Maximum Ratings.11
Table 4: Electrostatic Discharge Ratings .11
Table 5: Recommended Operating Conditions .11
Table 6: EC at T = -40 °C to +85 °C, VDD = 2.3 V to 5.5 V Unless Otherwise Noted .12
Table 7: EC of the SDA and SCL IO stages at T = -40 °C to +85 °C, VDD = 2.3 V to 5.5 V Unless Otherwise Noted.14
Table 8: I2C Bus Timing Characteristics at T = -40 °C to +85 °C, VDD = 2.3 V to 5.5 V Unless Otherwise Noted .15
Table 9: Typical Current Estimated for Each Macrocell at T = -40 °C to +85 °C .15
Table 10: Typical Delay Estimated for Each Macrocell at T = 25 °C.16
Table 11: Programmable Delay Expected Delays and Widths (Typical) at T = 25 °C .17
Table 12: Typical Filter Rejection Pulse Width at T = 25 °C .17
Table 13: Typical Counter/Delay Offset at T = 25 °C .18
Table 14: Oscillators Frequency Limits, VDD = 2.3 V to 5.5 V.18
Table 15: Oscillators Power-On Delay at T = -40 °C to +85 °C, OSC Power Setting: "Auto Power-On" .18
Table 16: MS ACMP Specifications at T = -40 °C to +85 °C, VDD = 2.3 V to 5.5 V Unless Otherwise Noted .19
Table 17: Vref vs Temperature .21
Table 18: Matrix Input Table.31
Table 19: Matrix Output Table.33
Table 20: Connection Matrix Virtual Inputs .35
Table 21: 2-bit LUT2_0 to 2-bit LUT2_1 Truth Table .38
Table 22: 2-bit LUT Standard Digital Functions .38
Table 23: 2-bit LUT2_2 Truth Table .40
Table 24: 2-bit LUT Standard Digital Functions .40
Table 25: 3-bit LUT3_0 to 3-bit LUT3_9 Truth Table .47
Table 26: 3-bit LUT Standard Digital Functions .47
Table 27: 4-bit LUT0 Truth Table .51
Table 28: 4-bit LUT Standard Digital Functions .52
Table 29: 3-bit LUT8 Truth Table .60
Table 30: 3-bit LUT9 Truth Table .60
Table 31: 3-bit LUT10 Truth Table .60
Table 32: 3-bit LUT11 Truth Table .60
Table 33: 3-bit LUT12 Truth Table .60
Table 34: 3-bit LUT13 Truth Table .60
Table 35: Vref Selection Table.78
Table 36: Oscillator Control Input Modes .79
Table 37: Oscillator Operation Mode Configuration Settings .79
Table 38: Read/Write Protection Options.96
Table 39: Register Map.102
Table 40: MSL Classification.161 Datasheet
CFR0011-120-00 Revision 2.2
6 of 168 3-Feb-2021
© 2021 Dialog Semiconductor