Datasheet ISOSD61 (STMicroelectronics) - 9

制造商STMicroelectronics
描述16-bit isolated Sigma-Delta modulator, single-ended and LVDS interfaces
页数 / 页23 / 9 — ISOSD61. Device specifications. Table 11. Single-ended input and output …
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ISOSD61. Device specifications. Table 11. Single-ended input and output signaling specifications (ISOSD61). Parameter. Symbol

ISOSD61 Device specifications Table 11 Single-ended input and output signaling specifications (ISOSD61) Parameter Symbol

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ISOSD61 Device specifications Table 11. Single-ended input and output signaling specifications (ISOSD61) Parameter Symbol Min. Typ. Max. Units Conditions
2 V VDD = 3.3 V Input high voltage VIH VDD x 0.7 V VDD = 5 V 0.8 V VDD = 3.3 V Input low voltage VIL VDD x 0.3 V VDD = 5 V Input current IIND ±0.5 µA Input capacitance CIND 6 pF VDD = 5 V, VDD – 0.06 VDD – 0.04 V IOUT = -0.2 mA Output high voltage VOH VDD = 3.3 V, VDD – 0.05 VDD – 0.03 IOUT = -0.2 mA Output low voltage VOL 0.01 0.02 V IOUT = 0.2 mA
Table 12. Package characteristics Parameter Symbol Min. Typ. Max. Units Test conditions
IC junction-to-ambient thermal θ On a 2s2p JEDEC board in free air as per resistance JA 80 °C/W JEDEC JESD51, TA = 25°C
DS13605
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Rev 3 page 9/23
Document Outline Cover image Product status link / summary Features Application Description 1 Device overview 2 Pin description 3 Device specifications 4 Terminology 5 Theory of operation 6 Package description 7 Ordering information Revision history Contents List of tables List of figures