Datasheet MAX4473 (Maxim) - 5

Low-Cost, Low-Voltage, PA Power Control Amplifier for GSM Applications MAX4473 Pin Description PIN NAME FUNCTION
Inverting Input of Error Amplifier and Drain of V-to-I FET, Q1. Connect to supply side of current-sense 1 SR1 resistor, RSENSE, through gain resistor RG1. Noninverting Input of Error Amplifier. Connect to load side of current-sense resistor, RSENSE, through 2 SR2 gain resistor RG2. Set RG2 equal to RG1. Shutdown Input. Drive SHDN low to disable all amplifiers, pull OUT to GND, set the gate-to-source 3 SHDN voltage of the V-to-I FET (Q1) to 0, and reduce supply current to less than 1µA. Drive high or connect to VCC for normal operation. Power Control Input. Apply a voltage to PC to set a DC current through the sense resistor to control 4 PC PA bias. 5 GND Ground Inverting Input to V-to-I Converter and Source of V-to-I FET, Q1. Connect to ground through gain 6 SR3 resistor RG3. 7 OUT Output of Error Amplifier. Connect to gain control pin of power amplifier in bias control applications. 8 VCC +2.7V to +6.5V Voltage Supply Input. Bypass to ground with a 0.1µF capacitor.
Detailed Description
PA until the voltage drop across RSENSE equals the The MAX4473 is a voltage-controlled, unidirectional, voltage drop across external gain resistor, RG1. The voltage drop across RG1 sets the voltage drop across high-side current setting amplifier for applications R where accurate control of PA supply current is desired. SENSE, with a larger voltage drop resulting in more current delivered to the PA. The voltage drop across This device is intended for wireless TDMA based sys- RG1 is set by A1, A2, and the V-to-I FET, Q1. A voltage tems (GSM, DECT), where tight restrictions over the applied to the PC input of the input buffer is divided by PA’s transmit burst and output power require closed- four by a resistor-divider network. A2 forces its inverting loop control over the PA’s output power. When used input and the source of Q1 to VPC / 4, thus setting a with a PA, the MAX4473 functions as a voltage-con- voltage across RG3. The resulting current through RG3 trolled constant current source, accurately setting PA sets the current through RG1. This unique architecture supply current by varying the gain of the PA. If you allows the supply current to be set independent of sup- know the output power versus supply current profile for ply voltage. Set PA supply current according to the fol- the PA, you can set the PA’s output power by control- lowing equation: ling the amount of supply current delivered to the PA. ICCPA = ( VPC
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RG1 ) / ( 4
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RSENSE
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RG3 ) The MAX4473 is composed of an input buffer (A1), a
Shutdown Mode
voltage-to-current converting amplifier (A2), and a rail- When SHDN is a logic-level low (SHDN < 0.4V), ampli- to-rail output error amplifier (A3) (see Typical Operating fiers A1, A2, and A3 are off, Q1 is turned off, and the Circuit). External gain and sense resistors allow pro- output of A3 is actively pulled to ground with an N- grammability for a wide range of applications. channel FET. Supply current is reduced to less than In the Typical Operating Circuit, PA supply current 1µA in shutdown mode. Typical power-up time is 0.9µs flows from the system supply, through the external cur- and typical power-down time is 0.3µs, using the rent-sense resistor (RSENSE), to the PA. The rail-to-rail MAX4473 test circuit. outputs of the error amplifier, A3, adjust the gain of the
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