Datasheet MP6925A (Monolithic Power Systems) - 4
| 制造商 | Monolithic Power Systems |
| 描述 | Fast Turn-Off, CCM/DCM Compatible, Dual-LLC, Synchronous Rectifier with lmproved Noise Immunity |
| 页数 / 页 | 15 / 4 — MP6925A – FAST TURN-OFF, CCM/DCM DUAL LLC SYNCHRONOUS RECTIFIER |
| 文件格式/大小 | PDF / 1.3 Mb |
| 文件语言 | 英语 |
MP6925A – FAST TURN-OFF, CCM/DCM DUAL LLC SYNCHRONOUS RECTIFIER
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MP6925A – FAST TURN-OFF, CCM/DCM DUAL LLC SYNCHRONOUS RECTIFIER ELECTRICAL CHARACTERISTICS VDD = 12V, TJ = -40°C to +125°C, unless otherwise noted. Parameter Symbol Conditions Min Typ Max Units
VDD voltage range 4.2 35 V VDD UVLO rising 3.7 3.95 4.2 V VDD UVLO hysteresis 0.13 0.185 0.24 V Operating current ICC CLOAD = 4.7nF, fSW = 100kHz 16 20 mA Quiescent current IQ VSS - VD = 0.5V 4.6 6 mA VDD = 4V, LL = 0V 135 190 Shutdown current µA VDD = 20V, LL = 0V 155 210 Light-load mode current 175 225 µA Thermal shutdown (5) 150 °C Thermal shutdown 10 °C hysteresis (5)
Control Circuitry Section
VSS - VD forward voltage VFWD 28 45 58 mV Turn off threshold V (V DRV-OFF -56 -40 -20 mV SS - VD) CLOAD = 4.7nF, VGS = 2V 80 140 ns Turn-on delay tDON CLOAD = 10nF, VGS = 2V 90 180 ns Input bias current on VD VD = 180V 1 µA Turn-on blanking time tB_ON CLOAD = 4.7nF 0.75 1.1 1.65 µs Turn-off blanking time (5) tB_OFF CLOAD = 4.7nF 210 ns Turn-off blanking VDS V threshold B_OFF 1 1.7 2.5 V Light-load enter pulse t width LL RLL = 100kΩ 1.7 2.3 3 µs Light-load turn-on pulse t width hysteresis LL-H RLL = 100kΩ 0.45 µs Light-load enter delay tLL-D 0.5 1 1.52 ms Light-load enter pulse- width threshold VLL-GS 0.6 V (VG1/2 - VSS) (5) Gate disable threshold V on LL LL_DIS 0.1 0.2 0.3 V Light-load exit switch-on V threshold (V LL_DS -330 -230 -130 mV DS)
Gate Driver Section
VG (low) VG_L ILOAD = 1mA 0.1 V VDD > 10V 11.5 13 V VG (high) VG_H VDD ≤ 10V VDD Turn-off propagation V delay D = VSS 15 ns V t D = VSS, CLOAD = 4.7nF, RGATE = 0Ω, DOFF 35 80 ns VGS = 2V Turn-off total delay V t D = VSS, CLOAD = 10nF, RGATE = 0Ω, DOFF 45 100 ns VGS = 2V Pull-down impedance 0.6 1.5 Ω
Note:
5) Guaranteed by characterization. MP6925A Rev. 1.0 www.MonolithicPower.com
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2/26/2020 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2020 MPS. All Rights Reserved.
VDD voltage range 4.2 35 V VDD UVLO rising 3.7 3.95 4.2 V VDD UVLO hysteresis 0.13 0.185 0.24 V Operating current ICC CLOAD = 4.7nF, fSW = 100kHz 16 20 mA Quiescent current IQ VSS - VD = 0.5V 4.6 6 mA VDD = 4V, LL = 0V 135 190 Shutdown current µA VDD = 20V, LL = 0V 155 210 Light-load mode current 175 225 µA Thermal shutdown (5) 150 °C Thermal shutdown 10 °C hysteresis (5)
Control Circuitry Section
VSS - VD forward voltage VFWD 28 45 58 mV Turn off threshold V (V DRV-OFF -56 -40 -20 mV SS - VD) CLOAD = 4.7nF, VGS = 2V 80 140 ns Turn-on delay tDON CLOAD = 10nF, VGS = 2V 90 180 ns Input bias current on VD VD = 180V 1 µA Turn-on blanking time tB_ON CLOAD = 4.7nF 0.75 1.1 1.65 µs Turn-off blanking time (5) tB_OFF CLOAD = 4.7nF 210 ns Turn-off blanking VDS V threshold B_OFF 1 1.7 2.5 V Light-load enter pulse t width LL RLL = 100kΩ 1.7 2.3 3 µs Light-load turn-on pulse t width hysteresis LL-H RLL = 100kΩ 0.45 µs Light-load enter delay tLL-D 0.5 1 1.52 ms Light-load enter pulse- width threshold VLL-GS 0.6 V (VG1/2 - VSS) (5) Gate disable threshold V on LL LL_DIS 0.1 0.2 0.3 V Light-load exit switch-on V threshold (V LL_DS -330 -230 -130 mV DS)
Gate Driver Section
VG (low) VG_L ILOAD = 1mA 0.1 V VDD > 10V 11.5 13 V VG (high) VG_H VDD ≤ 10V VDD Turn-off propagation V delay D = VSS 15 ns V t D = VSS, CLOAD = 4.7nF, RGATE = 0Ω, DOFF 35 80 ns VGS = 2V Turn-off total delay V t D = VSS, CLOAD = 10nF, RGATE = 0Ω, DOFF 45 100 ns VGS = 2V Pull-down impedance 0.6 1.5 Ω
Note:
5) Guaranteed by characterization. MP6925A Rev. 1.0 www.MonolithicPower.com
4
2/26/2020 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2020 MPS. All Rights Reserved.