Datasheet MMBT3640 (ON Semiconductor) - 4
| 制造商 | ON Semiconductor |
| 描述 | PNP Switching Transistor |
| 页数 / 页 | 6 / 4 — MMBT3640 — PNP Switching Amplifier Physical Dimensions SOT-23. 0.95 … |
| 修订版 | A |
| 文件格式/大小 | PDF / 334 Kb |
| 文件语言 | 英语 |
MMBT3640 — PNP Switching Amplifier Physical Dimensions SOT-23. 0.95 2.92±0.20. 1.40 1.30+0.20. -0.15 1 2.20 2. 0.60. 0.37 (0.29)
该数据表的模型线
文件文字版本
MMBT3640 — PNP Switching Amplifier Physical Dimensions SOT-23
0.95 2.92±0.20
3
1.40 1.30+0.20
-0.15 1 2.20 2
0.60
0.37 (0.29)
0.95 0.20 1.00 A B 1.90 1.90
LAND PATTERN
RECOMMENDATION
SEE DETAIL A 1.20 MAX 0.10
0.00 (0.93) 0.10 C C
2.40±0.30 NOTES: UNLESS OTHERWISE SPECIFIED GAGE PLANE 0.23
0.08 A) REFERENCE JEDEC REGISTRATION
TO-236, VARIATION AB, ISSUE H.
B) ALL DIMENSIONS ARE IN MILLIMETERS.
C) DIMENSIONS ARE INCLUSIVE OF BURRS,
MOLD FLASH AND TIE BAR EXTRUSIONS.
D) DIMENSIONING AND TOLERANCING PER
ASME Y14.5M -1994.
E) DRAWING FILE NAME: MA03DREV10 0.25 0.20 MIN
(0.55) SEATING
PLANE SCALE: 2X Figure1. 3-LEAD, SOT23, JEDEC TO-236, LOW PROFILE (ACTIVE)
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the
warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/dwg/MA/MA03D.pdf.
For current tape and reel specifications, visit Fairchild Semiconductor’s online packaging area:
http://www.fairchildsemi.com/packing_dwg/PKG-MA03D.pdf. © 2001 Fairchild Semiconductor Corporation
MMBT3640 Rev. 1.1.0 www.fairchildsemi.com
3
0.95 2.92±0.20
3
1.40 1.30+0.20
-0.15 1 2.20 2
0.60
0.37 (0.29)
0.95 0.20 1.00 A B 1.90 1.90
LAND PATTERN
RECOMMENDATION
SEE DETAIL A 1.20 MAX 0.10
0.00 (0.93) 0.10 C C
2.40±0.30 NOTES: UNLESS OTHERWISE SPECIFIED GAGE PLANE 0.23
0.08 A) REFERENCE JEDEC REGISTRATION
TO-236, VARIATION AB, ISSUE H.
B) ALL DIMENSIONS ARE IN MILLIMETERS.
C) DIMENSIONS ARE INCLUSIVE OF BURRS,
MOLD FLASH AND TIE BAR EXTRUSIONS.
D) DIMENSIONING AND TOLERANCING PER
ASME Y14.5M -1994.
E) DRAWING FILE NAME: MA03DREV10 0.25 0.20 MIN
(0.55) SEATING
PLANE SCALE: 2X Figure1. 3-LEAD, SOT23, JEDEC TO-236, LOW PROFILE (ACTIVE)
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the
warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/dwg/MA/MA03D.pdf.
For current tape and reel specifications, visit Fairchild Semiconductor’s online packaging area:
http://www.fairchildsemi.com/packing_dwg/PKG-MA03D.pdf. © 2001 Fairchild Semiconductor Corporation
MMBT3640 Rev. 1.1.0 www.fairchildsemi.com
3