Datasheet GD32E507xx (GigaDevice) - 2

link to page 2 link to page 5 link to page 6 link to page 8 link to page 9 link to page 9 link to page 10 link to page 11 link to page 14 link to page 18 link to page 20 link to page 20 link to page 30 link to page 38 link to page 44 link to page 44 link to page 44 link to page 45 link to page 45 link to page 46 link to page 47 link to page 47 link to page 47 link to page 48 link to page 48 link to page 49 link to page 50 link to page 50 link to page 51 link to page 51 GD32E507xx Datasheet
Table of Contents Table of Contents ... 1 List of Figures .. 4 List of Tables .. 5 1. General description ... 7 2. Device overview ... 8 2.1. Device information .. 8 2.2. Block diagram .. 9 2.3. Pinouts and pin assignment ... 10 2.4. Memory map .. 13 2.5. Clock tree ... 17 2.6. Pin definitions .. 19
2.6.1. GD32E507Zx LQFP144 pin definitions .. 19 2.6.2. GD32E507Vx LQFP100 pin definitions .. 29 2.6.3. GD32E507Rx LQFP64 pin definitions .. 37
3. Functional description .. 43 3.1. Arm® Cortex®-M33 core ... 43 3.2. Embedded memory ... 43 3.3. Clock, reset and supply management .. 44 3.4. Boot modes .. 44 3.5. Power saving modes ... 45 3.6. Analog to digital converter (ADC) .. 46 3.7. Digital to analog converter (DAC) ... 46 3.8. DMA .. 46 3.9. General-purpose inputs/outputs (GPIOs) .. 47 3.10. Timers and PWM generation ... 47 3.11. Real time clock (RTC) .. 48 3.12. Inter-integrated circuit (I2C) .. 49 3.13. Serial peripheral interface (SPI) .. 49 3.14. Universal synchronous asynchronous receiver transmitter (USART) ... 50 3.15. Inter-IC sound (I2S) .. 50
1 Document Outline Table of Contents List of Figures List of Tables 1. General description 2. Device overview 2.1. Device information 2.2. Block diagram 2.3. Pinouts and pin assignment 2.4. Memory map 2.5. Clock tree 2.6. Pin definitions 2.6.1. GD32E507Zx LQFP144 pin definitions 2.6.2. GD32E507Vx LQFP100 pin definitions 2.6.3. GD32E507Rx LQFP64 pin definitions 3. Functional description 3.1. Arm® Cortex®-M33 core 3.2. Embedded memory 3.3. Clock, reset and supply management 3.4. Boot modes 3.5. Power saving modes 3.6. Analog to digital converter (ADC) 3.7. Digital to analog converter (DAC) 3.8. DMA 3.9. General-purpose inputs/outputs (GPIOs) 3.10. Timers and PWM generation 3.11. Real time clock (RTC) 3.12. Inter-integrated circuit (I2C) 3.13. Serial peripheral interface (SPI) 3.14. Universal synchronous asynchronous receiver transmitter (USART) 3.15. Inter-IC sound (I2S) 3.16. Universal serial bus High-Speed interface (USBHS) 3.17. Controller area network (CAN) 3.18. Ethernet (ENET) 3.19. External memory controller (EXMC) 3.20. Comparators (CMP) 3.21. Trigonometric Math Unit (TMU) 3.22. Super High-Resolution Timer (SHRTIMER) 3.23. Serial/Quad Parallel Interface (SQPI) 3.24. Debug mode 3.25. Package and operation temperature 4. Electrical characteristics 4.1. Absolute maximum ratings 4.2. Operating conditions characteristics 4.3. Power consumption 4.4. EMC characteristics 4.5. Power supply supervisor characteristics 4.6. Electrical sensitivity 4.7. External clock characteristics 4.8. Internal clock characteristics 4.9. PLL characteristics 4.10. Memory characteristics 4.11. NRST pin characteristics 4.12. GPIO characteristics 4.13. Temperature sensor characteristics 4.14. ADC characteristics 4.15. DAC characteristics 4.16. Comparators characteristics 4.17. Trigonometric Math Unit (TMU) characteristics 4.18. I2C characteristics 4.19. SPI characteristics 4.20. I2S characteristics 4.21. USART characteristics 4.22. CAN characteristics 4.23. USBHS characteristics 4.24. EXMC characteristics 4.25. Serial/Quad Parallel Interface (SQPI) characteristics 4.26. Super High-Resolution Timer (SHRTIMER) characteristics 4.27. TIMER characteristics 4.28. WDGT characteristics 4.29. Parameter condition 5. Package information 5.1. LQFP144 package outline dimensions 5.2. LQFP100 package outline dimensions 5.3. LQFP64 package outline dimensions 6. Ordering information 7. Revision history