Datasheet nPM1100 (Nordic Semiconductor) - 9
| 制造商 | Nordic Semiconductor |
| 描述 | Integrated Power Management IC (PMIC) with a linear-mode lithium-ion/lithium-polymer battery charger in a compact 2.1x2.1 mm WLCSP package |
| 页数 / 页 | 58 / 9 — Pin. Function. Input type. Usage reference. VTERMSET. ICHG. ISET. VBUS. … |
| 文件格式/大小 | PDF / 2.9 Mb |
| 文件语言 | 英语 |
Pin. Function. Input type. Usage reference. VTERMSET. ICHG. ISET. VBUS. MODE. VOUTBSETx. VOUTB. SHPACT. SHPHLD. VSYS. VOUTSET0
该数据表的模型线
文件文字版本
link to page 21 link to page 21 link to page 21 link to page 21 link to page 15 link to page 15 link to page 29 link to page 29 link to page 29 link to page 29 link to page 29 link to page 9 link to page 10 link to page 9 link to page 10 link to page 15 link to page 19 link to page 28 link to page 15 link to page 19 Product overview
Pin Function Input type Usage reference VTERMSET
Sets termination voltage Static (H/L) Termination voltage (VTERMSET) on page Battery dependent 21
ICHG
Charge current limit Static (resistor) Charge current limit (ICHG) on page 21
ISET VBUS
current limit Dynamic (H/L) USB port detection and VBUS current limiting on page 15
MODE
BUCK PWM mode Dynamic (H/L) BUCK mode selection override (MODE) on page 29
VOUTBSETx
Two pin
VOUTB
voltage Static (H/L) Output voltage configuration selection (VOUTBSET0, VOUTBSET1) on page 29
SHPACT
Enables Ship mode Dynamic (H/L)1 Using Ship mode on page 10
SHPHLD
Disables Ship mode Dynamic (H/L)1 Using Ship mode on page 10 Table 2: In circuit configurations 1These pins are level and hold-time controlled. 3.2 System description The device has the following core components that are described in detail in the respective chapters. • SYSREG — System regulator on page 15 • CHARGER — Battery charger on page 19 • BUCK — Buck regulator on page 28 The system regulator (SYSREG) is a 5 V LDO supplied by
VBUS
. It generates VINT when enabled. VINT is the internal supply for the device and available on an external pin,
VSYS
. SYSREG supports a wide operating voltage range on
VBUS
, tolerates transient voltages up to 20 V, and implements overvoltage protection. SYSREG also implements configurable current limiting from
VBUS
, and USB port detection. When
VBUS
is disconnected, SYSREG ensures the device enters Ultra-Low Power mode to minimize quiescent current. Reverse current protection is enabled when VBUS<VBAT. See SYSREG — System regulator on page 15 for more information and electrical parameters. The battery charger (CHARGER) is a JEITA compatible linear battery charger for Li-ion/Li-poly batteries. CHARGER controls the charge cycle using a standard Li-ion charge profile. CHARGER implements dynamic power-path management regulating current in and out of the battery, depending on system requirements. Charge current and charge termination voltage can be set via the
ICHG
and
VTERMSET
pins respectively. LED drivers for charging indication and charging error indication are implemented in CHARGER. See CHARGER — Battery charger on page 19 for more information and electrical parameters. The buck regulator (BUCK) is a step-down DC/DC regulator with PWM and hysteretic modes with automatic control for optimum efficiency and manual enable of PWM mode to reduce voltage ripple and inductive interference if needed. The output voltage is pin configurable (through
VOUTSET0
and 4445_367 v1.0 9 Document Outline Contents nPM1100 Feature list Revision history About this document 2.1 Document status 2.2 Core component chapters Product overview 3.1 Block diagram 3.1.1 In circuit configurations 3.2 System description 3.3 Power-on reset (POR) and brownout reset (BOR) 3.4 DPPM — Dynamic power-path management 3.5 Using Ship mode 3.6 Thermal protection 3.7 Battery considerations 3.8 Charging and Error LED drivers 3.9 System electrical parameters 3.10 System efficiency Absolute maximum ratings Recommended operating conditions 5.1 Dissipation ratings 5.2 WLCSP light sensitivity Core components 6.1 SYSREG — System regulator 6.1.1 USB port detection and VBUS current limiting 6.1.2 SYSREG resistance and output voltage 6.1.3 VBUS overvoltage and undervoltage protection 6.1.4 VBUS disconnect 6.1.5 Electrical parameters 6.1.6 Electrical characteristics 6.2 CHARGER — Battery charger 6.2.1 Charging cycle 6.2.2 Battery detection and UVLO 6.2.3 Termination voltage (VTERMSET) 6.2.4 Termination and trickle charge current 6.2.5 Charge current limit (ICHG) 6.2.6 Battery thermal protection using NTC thermistor (NTC) 6.2.7 Charger thermal regulation 6.2.8 Charger error conditions 6.2.9 Charging indication (CHG) and charging error indication (ERR) 6.2.10 DPPM — Dynamic power-path management 6.2.11 Electrical parameters 6.2.12 Electrical characteristics 6.3 BUCK — Buck regulator 6.3.1 Output voltage selection (VOUTBSET0, VOUTBSET1) 6.3.2 BUCK mode selection (MODE) 6.3.3 Component selection 6.3.4 Electrical parameters 6.3.5 Electrical characteristics Application 7.1 Schematic 7.2 Supplying from BUCK 7.3 USB port negotiation 7.4 CHG and ERR 7.5 Termination voltage and current 7.6 NTC configuration 7.7 Ship mode 7.8 Battery monitoring and low battery indication Hardware and layout 8.1 Ball assignments 8.2 Mechanical specifications 8.2.1 WLCSP 2.075x2.075 mm package 8.3 Reference circuitry 8.3.1 Configuration 1 8.3.2 Configuration 2 8.3.3 Configuration 3 8.3.4 PCB guidelines 8.3.5 PCB layout example Ordering information 9.1 IC marking 9.2 Box labels 9.3 Order code 9.4 Code ranges and values 9.5 Product options Legal notices
Pin Function Input type Usage reference VTERMSET
Sets termination voltage Static (H/L) Termination voltage (VTERMSET) on page Battery dependent 21
ICHG
Charge current limit Static (resistor) Charge current limit (ICHG) on page 21
ISET VBUS
current limit Dynamic (H/L) USB port detection and VBUS current limiting on page 15
MODE
BUCK PWM mode Dynamic (H/L) BUCK mode selection override (MODE) on page 29
VOUTBSETx
Two pin
VOUTB
voltage Static (H/L) Output voltage configuration selection (VOUTBSET0, VOUTBSET1) on page 29
SHPACT
Enables Ship mode Dynamic (H/L)1 Using Ship mode on page 10
SHPHLD
Disables Ship mode Dynamic (H/L)1 Using Ship mode on page 10 Table 2: In circuit configurations 1These pins are level and hold-time controlled. 3.2 System description The device has the following core components that are described in detail in the respective chapters. • SYSREG — System regulator on page 15 • CHARGER — Battery charger on page 19 • BUCK — Buck regulator on page 28 The system regulator (SYSREG) is a 5 V LDO supplied by
VBUS
. It generates VINT when enabled. VINT is the internal supply for the device and available on an external pin,
VSYS
. SYSREG supports a wide operating voltage range on
VBUS
, tolerates transient voltages up to 20 V, and implements overvoltage protection. SYSREG also implements configurable current limiting from
VBUS
, and USB port detection. When
VBUS
is disconnected, SYSREG ensures the device enters Ultra-Low Power mode to minimize quiescent current. Reverse current protection is enabled when VBUS<VBAT. See SYSREG — System regulator on page 15 for more information and electrical parameters. The battery charger (CHARGER) is a JEITA compatible linear battery charger for Li-ion/Li-poly batteries. CHARGER controls the charge cycle using a standard Li-ion charge profile. CHARGER implements dynamic power-path management regulating current in and out of the battery, depending on system requirements. Charge current and charge termination voltage can be set via the
ICHG
and
VTERMSET
pins respectively. LED drivers for charging indication and charging error indication are implemented in CHARGER. See CHARGER — Battery charger on page 19 for more information and electrical parameters. The buck regulator (BUCK) is a step-down DC/DC regulator with PWM and hysteretic modes with automatic control for optimum efficiency and manual enable of PWM mode to reduce voltage ripple and inductive interference if needed. The output voltage is pin configurable (through
VOUTSET0
and 4445_367 v1.0 9 Document Outline Contents nPM1100 Feature list Revision history About this document 2.1 Document status 2.2 Core component chapters Product overview 3.1 Block diagram 3.1.1 In circuit configurations 3.2 System description 3.3 Power-on reset (POR) and brownout reset (BOR) 3.4 DPPM — Dynamic power-path management 3.5 Using Ship mode 3.6 Thermal protection 3.7 Battery considerations 3.8 Charging and Error LED drivers 3.9 System electrical parameters 3.10 System efficiency Absolute maximum ratings Recommended operating conditions 5.1 Dissipation ratings 5.2 WLCSP light sensitivity Core components 6.1 SYSREG — System regulator 6.1.1 USB port detection and VBUS current limiting 6.1.2 SYSREG resistance and output voltage 6.1.3 VBUS overvoltage and undervoltage protection 6.1.4 VBUS disconnect 6.1.5 Electrical parameters 6.1.6 Electrical characteristics 6.2 CHARGER — Battery charger 6.2.1 Charging cycle 6.2.2 Battery detection and UVLO 6.2.3 Termination voltage (VTERMSET) 6.2.4 Termination and trickle charge current 6.2.5 Charge current limit (ICHG) 6.2.6 Battery thermal protection using NTC thermistor (NTC) 6.2.7 Charger thermal regulation 6.2.8 Charger error conditions 6.2.9 Charging indication (CHG) and charging error indication (ERR) 6.2.10 DPPM — Dynamic power-path management 6.2.11 Electrical parameters 6.2.12 Electrical characteristics 6.3 BUCK — Buck regulator 6.3.1 Output voltage selection (VOUTBSET0, VOUTBSET1) 6.3.2 BUCK mode selection (MODE) 6.3.3 Component selection 6.3.4 Electrical parameters 6.3.5 Electrical characteristics Application 7.1 Schematic 7.2 Supplying from BUCK 7.3 USB port negotiation 7.4 CHG and ERR 7.5 Termination voltage and current 7.6 NTC configuration 7.7 Ship mode 7.8 Battery monitoring and low battery indication Hardware and layout 8.1 Ball assignments 8.2 Mechanical specifications 8.2.1 WLCSP 2.075x2.075 mm package 8.3 Reference circuitry 8.3.1 Configuration 1 8.3.2 Configuration 2 8.3.3 Configuration 3 8.3.4 PCB guidelines 8.3.5 PCB layout example Ordering information 9.1 IC marking 9.2 Box labels 9.3 Order code 9.4 Code ranges and values 9.5 Product options Legal notices