Datasheet MCP1502 (Microchip) - 8

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MCP1502
2.1.6 LOAD REGULATION Load regulation is defined as the voltage difference An ideal voltage reference wil maintain the specified when under no load (VOUT @ IOUT|0) and under maxi- mum load (V output voltage regardless of the load’s current demand. OUT @ IOUT|MAX), and is expressed as a percentage, as shown in Equation 2-7. However, real devices experience a small error voltage that deviates from the specified output voltage when a load is present.
EQUATION 2-7:
VOUT @ IOUT|0 – VOUT @ IOUT|MAX -------------------------------------------------------  100% = % Load Regulation VOUT @ IOUT|0 Similar to line regulation, load regulation may also be 2.1.8 LONG-TERM DRIFT expressed as %/mA or in ppm/mA, as shown in The long-term output stability is measured by exposing Equation 2-8 and Equation 2-9, respectively. the devices to an ambient temperature of +25°C.
EQUATION 2-8:
2.1.9 OUTPUT VOLTAGE HYSTERESIS V  OUT  The output voltage hysteresis is a measure of the out- ------------------ V   put voltage error after the powered devices are cycled OUTNOM ---------------------  % 100% = ---- Load Regulation over the entire operating temperature range. The IOUT mA amount of hysteresis can be quantified by measuring the change in the +25°C output voltage after tempera-
EQUATION 2-9:
ture excursions from +25°C to +125°C to +25°C, and also from +25°C to -40°C to +25°C. V  OUT  ------------------ 2.1.10 LAYOUT CONSIDERATION FOR V  OUTNOM 6 LOAD REGULATION -----  ppm  ---------------- 10 = ----- Load Regulation IOUT mA For applications which require high currents and/or highly variable currents, the PCB layout is important for As an example, if the MCP1502-20 is implemented in a minimizing the load coefficient (variation in output design and a 10 μV change in output voltage is voltage vs. load current) of the device. Of particular measured from a 2 mA change in the output load, then importance is the grounding of the device to a large the error in percent, ppm/mA, is as shown in ground plane with good thermal mass. The MCP1502 Equation 2-10 and Equation 2-11. should not be placed on a small daughter card, or con- nected to ground via long traces or single vias if the
EQUATION 2-10:
load coefficient is to be optimized; the additional power 2.048V – 2.04799V dissipation caused by the high load current wil cause a -----------------------  100% = .0004882% 2.04799V small change in the output voltage due to self-heating of the device.
EQUATION 2-11:
For systems with high ground currents, variations in the local ground can also be a source of the load coefficient. V These are usually solved by ensuring the local ground for  OUT  ------------------  10 V  V ---------  the device is shared with the Point-of-Load (POL). In  OUTNOM 6 2.048V 6 ppm ---------------------- 1  0 = ------------ 10  2. = 441 ----- some cases, it may be necessary to ensure the device IOUT 2 mA   mA   ground is specifically Kelvin sourced from the Point-of-Load, such that a zero IR drop from unassociated circuitry is seen on the device output voltage. 2.1.7 POWER SUPPLY REJECTION RATIO (PSRR) Power Supply Rejection Ratio (PSRR) is a measure of the change in Output Voltage (ΔVOUT) relative to the change in Input Voltage (ΔVIN) over frequency. DS20006593A-page 8  2021 Microchip Technology Inc. and its subsidiaries Document Outline Features Applications Related Parts General Description Package Types Block Diagram 1.0 Pin Function Table TABLE 1-1: Pin Function Table 1.1 Buffered VREF Output (OUT) 1.2 System Ground (GND) 1.3 Shutdown Pin (SHDN) 1.4 Power Supply Input (VDD) 2.0 Electrical Characteristics Absolute Maximum Ratings(†) TABLE 2-1: DC Characteristics TABLE 2-2: Temperature Specifications 2.1 Terminology 2.1.1 Output Voltage (VOUT) 2.1.2 Input Voltage (VIN) 2.1.3 Temperature Coefficient (Tc) EQUATION 2-1: TC Calculation 2.1.4 Dropout Voltage (VDO) 2.1.5 Line Regulation EQUATION 2-2: EQUATION 2-3: EQUATION 2-4: EQUATION 2-5: EQUATION 2-6: 2.1.6 Load Regulation EQUATION 2-7: EQUATION 2-8: EQUATION 2-9: EQUATION 2-10: EQUATION 2-11: 2.1.7 Power Supply Rejection Ratio (PSRR) 2.1.8 Long-Term Drift 2.1.9 Output Voltage Hysteresis 2.1.10 Layout Consideration for Load Regulation 3.0 Typical Operating Curves FIGURE 3-1: MCP1502-10 VREF Output vs. Temperature, VDD = 5.5V. FIGURE 3-2: MCP1502-20 VREF Output vs. Temperature, VDD = 5.5V. FIGURE 3-3: MCP1502-40 VREF Output vs. Temperature, VDD = 5.5V. FIGURE 3-4: Load Regulation vs. Temperature. FIGURE 3-5: IDD vs. Temperature. FIGURE 3-6: MCP1502 – Line Regulation vs. Temperature. FIGURE 3-7: IDD vs. VDD for All Options. FIGURE 3-8: Noise vs. Frequency, No Load, TA = +25°C. FIGURE 3-9: PSRR vs. Frequency, No Load, TA = +25°C. FIGURE 3-10: PSRR vs. Frequency, 1 kΩ Load, TA = +25°C. FIGURE 3-11: Dropout Voltage vs. Load, TA = +25°C. FIGURE 3-12: MCP1502 Tempco Distribution, No Load, VDD = 2.7V. FIGURE 3-13: MCP1502 Tempco Distribution, No Load, VDD = 5.5V. FIGURE 3-14: VOUT Drift vs. Time, TA = +25°C, No Load, 800 Units. FIGURE 3-15: MCP1502-10 VREF and Load Regulation vs. Load Current. FIGURE 3-16: MCP1502-20 VREF and Load Regulation vs. Load Current. FIGURE 3-17: MCP1502-40 VREF and Load Regulation vs. Load Current. FIGURE 3-18: MCP1502 Output Voltage Histogram, VDD = 2.7V. FIGURE 3-19: MCP1502 Output Voltage Histogram, VDD = 5.5V. FIGURE 3-20: Fast Ramp Start-up @ +25°C for All Options. FIGURE 3-21: Slow Ramp Start-up @ +25°C for All Options. FIGURE 3-22: IDD Turn-On Transient Response. FIGURE 3-23: Shutdown Low-to-High Slow Ramp Turn-On Transient Response @ +25°C for All Options. FIGURE 3-24: Load Regulation Transient Response @ +25°C for All Options. FIGURE 3-25: Line Regulation Transient Response @ +25°C for All Options. FIGURE 3-26: MCP1502-10 Transient Response vs. Capacitive Load, VDD = 5V. FIGURE 3-27: MCP1502-20 Transient Response vs. Capacitive Load, VDD = 5V. FIGURE 3-28: MCP1502-40 Transient Response vs. Capacitive Load, VDD = 5V. FIGURE 3-29: MCP1502-10 Transient Response vs. RS, VDD = 5V, CL = 4.7 nF. FIGURE 3-30: MCP1502-20 Transient Response vs. RS, VDD = 5V, CL = 4.7 nF. FIGURE 3-31: MCP1502-40 Transient Response vs. RS, VDD = 5V, CL = 4.7 nF. FIGURE 3-32: MCP1502-10 Transient Response vs. VDD, CL = 4.7 nF. FIGURE 3-33: MCP1502-20 Transient Response vs. VDD, CL = 4.7 nF. FIGURE 3-34: MCP1502-40 Transient Response vs. VDD, CL = 4.7 nF. 4.0 Theory of Operation 5.0 Application Circuits 5.1 Application Tips 5.1.1 Basic Application Circuit FIGURE 5-1: Basic Circuit Configuration. FIGURE 5-2: Output Noise Reducing Filter. EQUATION 5-1: 5.1.2 Load Capacitor 5.1.3 Printed Circuit Board Layout Considerations 5.2 Typical Applications Circuits 5.2.1 Negative Voltage Reference FIGURE 5-3: Negative Voltage Reference. 5.2.2 A/D Converter Reference FIGURE 5-4: ADC Example Circuit. FIGURE 5-5: SAR ADC Example Circuit. 6.0 Package Information 6.1 Package Markings Appendix A: Revision History Revision A (September 2021) Product Identification System Worldwide Sales and Service