Preliminary Datasheet EPC2302 (Efficient Power Conversion) - 2

eGaN® FET DATASHEET
EPC2302
Thermal Characteristics PARAMETER TYP UNIT
RθJC Thermal Resistance, Junction-to-Case (Case TOP) 0.2 RθJB Thermal Resistance, Junction-to-Board (Case BOTTOM) 1.5 °C/W RθJA_JEDEC Thermal Resistance, Junction-to-Ambient (using JEDEC 51-2 PCB) 45 RθJA_EVB Thermal Resistance, Junction-to-Ambient (using EPC90142 EVB) 21
Static Characteristics (TJ = 25°C unless otherwise stated) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
BVDSS Drain-to-Source Voltage VGS = 0 V, ID = 0.15 mA 100 V IDSS Drain-Source Leakage VDS = 80 V, VGS = 0 V 1 100 μA Gate-to-Source Forward Leakage VGS = 5 V 0.01 4 mA IGSS Gate-to-Source Reverse Leakage# VGS = 5 V, TJ = 125°C 0.4 9 Gate-to-Source Reverse Leakage VGS = -4 V 10 80 μA VGS(TH) Gate Threshold Voltage VDS = VGS, ID = 14 mA 0.8 1.3 2.5 V RDS(on) Drain-Source On Resistance VGS = 5 V, ID = 50 A 1.4 1.8 mΩ VSD Source-to-Drain Forward Voltage IS = 0.5 A, VGS = 0 V 1.5 V # Defined by design. Not subject to production test.
Dynamic Characteristics (TJ = 25°C unless otherwise stated) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
CISS Input Capacitance 3200 CRSS Reverse Transfer Capacitance VDS = 50 V, VGS = 0 V 7 COSS Output Capacitance 1000 pF COSS(ER) Effective Output Capacitance, Energy Related (Note 1) 1300 VDS = 0 to 50 V, VGS = 0 V COSS(TR) Effective Output Capacitance, Time Related (Note 2) 1700 RG Gate Resistance 0.5 Ω QG Total Gate Charge VDS = 50 V, VGS = 5 V, ID = 50 A 23 QGD Gate-to-Drain Charge VDS = 50 V, ID = 50 A 2.3 nC QOSS Output Charge VDS = 50 V, VGS = 0 V 85 QRR Source-Drain Recovery Charge 0 # Defined by design. Not subject to production test. Note 1: COSS(ER) is a fixed capacitance that gives the same stored energy as COSS while VDS is rising from 0 to 50% BVDSS. Note 2: COSS(TR) is a fixed capacitance that gives the same charging time as COSS while VDS is rising from 0 to 50% BVDSS. EPC – POWER CONVERSION TECHNOLOGY LEADER | EPC-CO.COM | ©2021 | | 2