Datasheet STGAP2SiCD (STMicroelectronics) - 2

STGAP2SiCD Block diagram 1 Block diagram Figure 1. Block diagram
VDD VH_A UVLO VH Level GON_A INA Floating Section Shifter Control GOFF_A Logic CLAMP_A INB
I
GNDISO_A
S
Control Floating ground A +
O
SD
L
Logic VCLAMPth
A T
VH_B
I
BRAKE
O N
UVLO VH Floating Level GON_B Section Shifter Control VDD GOFF_B Logic CLAMP_B iLOCK GND GNDISO_B Floating ground B + VCLAMPth
DS13714
-
Rev 1 page 2/23
Document Outline Cover image Product status link / summary Features Application Description 1 Block diagram 2 Pin description and connection diagram 3 Electrical data 3.1 Absolute maximum ratings 3.2 Thermal data 3.3 Recommended operating conditions 4 Electrical characteristics 5 Isolation 6 Functional description 6.1 Gate driving power supply and UVLO 6.2 Power-up, power-down and ‘safe state’ 6.3 Control Inputs 6.4 Watchdog 6.5 Thermal shutdown protection 6.6 Standby function 6.7 Interlocking function 7 Typical application diagram 8 Layout 8.1 Layout guidelines and considerations 8.2 Layout example 9 Testing and characterization information 10 Package information 10.1 SO-36W package information 11 Suggested land pattern 12 Ordering information Revision history Contents List of tables List of figures