Datasheet STGAP2SiCD (STMicroelectronics) - 7

制造商STMicroelectronics
描述Galvanically isolated 4 A dual gate driver
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STGAP2SiCD. Electrical characteristics. Symbol. Pin. Parameter. Test conditions. Min. Typ. Max. Unit. Driver buffer section. Miller Clamp

STGAP2SiCD Electrical characteristics Symbol Pin Parameter Test conditions Min Typ Max Unit Driver buffer section Miller Clamp

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STGAP2SiCD Electrical characteristics Symbol Pin Parameter Test conditions Min. Typ. Max. Unit
iLOCK iLOCK high level bias _h iLOCK iLOCK = VDD 1 µA current iLOCK iLOCK low level bias _l iLOCK iLOCK = GND 35 55 75 µA current iLOCK_pu iLOCK iLOCK pull-up resistor 66 90 142 kΩ
Driver buffer section
TJ = 25°C 4 I Source short-circuit GON A current TJ = -40 / +125°C (2) 3 5 V Source output high level GONH I voltage GON = 100 mA VH-0.15 VH-0.12 V RGON Source RDS_ON IGON = 100 mA 1.25 1.5 Ω TJ = 25°C 4 IGOFF Sink short-circuit current A TJ = -40 / +125°C (2) 3 5.5 V Sink output low level GOFFL I voltage GOFF = 100 mA 110 120 mV RGOFF Sink RDS_ON IGOFF = 100 mA 1.1 1.2 Ω
Miller Clamp
V CLAMP voltage CLAMPth V threshold CLAMP vs. GNDISO 1.3 2 2.6 V VCLAMP = 15 V I CLAMP short-circuit CLAMP TJ = 25°C 4 A current TJ = -40 ÷ +125°C (2) 2 5 V CLAMP low level output CLAMP_L I voltage CLAMP = 100 mA 96 115 mV RCLAMP CLAMP RDS_ON ICLAMP = 100 mA 0.96 1.15 Ω
Overtemperature protection
TSD Shutdown temperature (2) 170 °C Temperature hysteresis Thys 20 °C (2)
Standby
tSTBY Standby time See Section 6.3 200 280 500 µs tWUP Wake-up time See Section 6.3 10 20 35 µs tawake Wake-up delay See Section 6.3 90 140 200 µs tstbyfilt Standby filter See Section 6.3 200 280 800 ns 1. MT = max (|tDon(A) - tDon(B)|, |tDoff(A) - tDoff(B)|, |tDoff(A) - tDon(B)|, |tDoff(B) - tDon(A)|) 2. Characterization data, not tested in production.
DS13714
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Rev 1 page 7/23
Document Outline Cover image Product status link / summary Features Application Description 1 Block diagram 2 Pin description and connection diagram 3 Electrical data 3.1 Absolute maximum ratings 3.2 Thermal data 3.3 Recommended operating conditions 4 Electrical characteristics 5 Isolation 6 Functional description 6.1 Gate driving power supply and UVLO 6.2 Power-up, power-down and ‘safe state’ 6.3 Control Inputs 6.4 Watchdog 6.5 Thermal shutdown protection 6.6 Standby function 6.7 Interlocking function 7 Typical application diagram 8 Layout 8.1 Layout guidelines and considerations 8.2 Layout example 9 Testing and characterization information 10 Package information 10.1 SO-36W package information 11 Suggested land pattern 12 Ordering information Revision history Contents List of tables List of figures