Datasheet NXS0506 (Nexperia) - 5

Nexperia NXS0506 SD 3.0-compatible memory card integrated auto-direction control and level translator with EMI filter and ESD protection 9. Functional description 9.1. Level translator
The bidirectional level translator shifts the data between the I/O supply levels of the host and the memory card. Auto direction sensing circuitry determines if a command and data signals are transferred from the memory card to the host (card read mode) or from the host to the memory card (card write mode). The voltage translator has to support several clock and data transfer rates at the signaling levels specified in the SD 3.0 standard specification.
Table 4. Supported modes Bus speed mode Signal level (V) Clock rate (MHz) Data rate (MB/s)
Default-Speed 3.3 25 12.5 High-Speed 3.3 50 25 SDR12 1.8 25 12.5 SDR25 1.8 50 25 SDR50 1.8 100 50 SDR104 1.8 208 104 DDR50 1.8 50 50
9.2. Enable and direction control
The device contains an auto-enable feature. If VCCB rises above 1.5 V, the level translator logic is enabled automatical y. As soon as VCCB drops below 0.65 V, the memory card side drivers and the level translator logic are disabled. All pins on the host side, excluding CLKA are configured as inputs with a 70 kΩ resistor pulled up to VCCA. The device features an auto correction control for all data channels except CLK. For these pins the direction of data flow is sensed by the direction control logic and the output drivers are controlled accordingly. There is no need for the host interface to indicate the direction of data flow.
9.3. Feedback clock channel
The clock is transmitted from the host to the memory card side. The voltage translator and the Printed-Circuit Board (PCB) tracks introduce some amount of delay. It reduces timing margin for data read back from memory card, especially at higher data rates. Therefore, a feedback path is provided to compensate the delay. The reasoning behind this approach is the fact that the clock is always delivered by the host, while the data in the timing critical read mode comes from the card.
9.4. EMI filter
All input/output driver stages are equipped with EMI filters to reduce interference towards sensitive mobile communication.
9.5. ESD protection
The device has robust ESD protections on all memory card pins. The architecture prevents any stress for the host: the voltage translator discharges any stress to supply ground. NXS0506 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2022. Al rights reserved
Product data sheet Rev. 1 — 31 January 2022 5 / 17
Document Outline 1. General description 2. Features and benefits 3. Applications 4. Ordering information 5. Marking 6. Block diagram 7. Functional diagram 8. Pinning information 8.1. Pinning 8.2. Pin description 9. Functional description 9.1. Level translator 9.2. Enable and direction control 9.3. Feedback clock channel 9.4. EMI filter 9.5. ESD protection 9.6. Pin and channel naming 10. Limiting values 11. Recommended operating conditions 12. Static characteristics 13. Dynamic characteristics 13.1. Level translator 14. Application information 14.1. PCB design guidelines 15. Design and assembly recommendations 15.1. PCB design guidelines 15.2. PCB assembly guidelines for Pb-free soldering 16. Package outline 17. Abbreviations 18. Revision history 19. Legal information Contents