Datasheet ADGS1212 (Analog Devices)
| 制造商 | Analog Devices |
| 描述 | SPI Interface, Quad SPST Switch, Low QINJ, Low CON, ±15 V/+12 V, Mux Configurable |
| 页数 / 页 | 24 / 1 — SPI Interface, Quad SPST Switch, Low QINJ,. Low CON, ±15 V/+12 V, Mux … |
| 文件格式/大小 | PDF / 655 Kb |
| 文件语言 | 英语 |
SPI Interface, Quad SPST Switch, Low QINJ,. Low CON, ±15 V/+12 V, Mux Configurable. Data Sheet. ADGS1212. FEATURES
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SPI Interface, Quad SPST Switch, Low QINJ, Low CON, ±15 V/+12 V, Mux Configurable Data Sheet ADGS1212 FEATURES FUNCTIONAL BLOCK DIAGRAM SPI interface with error detection ADGS1212 Includes CRC, invalid read/write address, and SCLK count error detection S1 D1 Supports burst mode and daisy-chain mode S2 D2 Industry-standard SPI Mode 0 and SPI Mode 3 compatible Guaranteed break-before-make switching allowing external S3 D3 wiring of switches to deliver multiplexer configurations S4 D4 VSS to VDD analog signal range Fully specified at ±15 V and +12 V supply SPI SDO ±4.5 V to ±16.5 V dual-supply operation INTERFACE 5 V to 16.5 V single-supply operation
1
Ultralow capacitance and leakage allows fast settling time
-00
SCLK SDI CS RESET/VL
936
1 pF typical off switch drain capacitance at 25°C, ±15 V
15 Figure 1.
2.6 pF typical on switch capacitance at 25°C, ±15 V <1 pC typical charge injection at 25°C 1.8 V logic compatibility with 2.7 V ≤ VL ≤ 3.3 V APPLICATIONS
In the off condition, signal levels up to the supplies are blocked.
Automated test equipment
The ultralow capacitance and charge injection of these switches
Data acquisition systems
make them ideal solutions for data acquisition and sample-and-
Battery-powered systems
hold applications where low glitch and fast settling are required.
Sample-and-hold systems
Fast switching speed coupled with high signal bandwidth make
Audio signal routing
the device suitable for video signal switching.
Video signal routing
Multifunction pin names may be referenced by their relevant
Communications systems
function only.
GENERAL DESCRIPTION PRODUCT HIGHLIGHTS
The ADGS1212 contains four independent single-pole/single- throw (SPST) switches. A serial peripheral interface (SPI) 1. SPI interface removes the need for parallel conversion, controls the switches. The SPI interface has robust error detection logic traces, and reduces the general-purpose input/output features such as cyclic redundancy check (CRC) error detection, (GPIO) channel count. invalid read/write address detection, and SCLK count error 2. Daisy-chain mode removes additional logic traces when detection. multiple devices are used. 3. CRC error detection, invalid read/write address detection, It is possible to daisy-chain multiple ADGS1212 devices together. and SCLK count error detection ensure a robust digital Daisy-chain mode enables the configuration of multiple devices interface. with minimal digital lines. The ADGS1212 can also operate in 4. CRC and error detection capabilities allow the ADGS1212 burst mode to decrease the time between SPI commands. to be used in safety critical systems. iCMOS construction ensures ultralow power dissipation, making 5. Guaranteed break-before-make switching allows the the the device ideal for portable and battery-powered instruments. ADGS1212 to be used in multiplexer configurations with Each switch conducts equally well in both directions when on, external wiring. and each switch has an input signal range that extends to the 6. The ADGS1212 1.8 V logic compatibility with 2.7 V ≤ VL ≤ supplies. 3.3 V 7. Ultralow capacitance. 8. <1 pC charge injection.
Rev. 0 Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Tel: 781.329.4700 ©2017 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. Technical Support www.analog.com
Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM PRODUCT HIGHLIGHTS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ±15 V DUAL SUPPLY 12 V SINGLE SUPPLY CONTINUOUS CURRENT PER CHANNEL, Sx OR Dx Four Channels On One Channel On TIMING CHARACTERISTICS Timing Diagrams ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TEST CIRCUITS TERMINOLOGY THEORY OF OPERATION ADDRESS MODE ERROR DETECTION FEATURES Cyclic Redundancy Check (CRC) Error Detection SCLK Count Error Detection Invalid Read/Write Address Error CLEARING THE ERROR FLAGS REGISTER BURST MODE SOFTWARE RESET DAISY-CHAIN MODE POWER-ON RESET APPLICATIONS INFORMATION BREAK-BEFORE-MAKE SWITCHING POWER SUPPLY RAILS POWER SUPPLY RECOMMENDATIONS REGISTER SUMMARY REGISTER DETAILS SWITCH DATA REGISTER ERROR CONFIGURATION REGISTER ERROR FLAGS REGISTER BURST ENABLE REGISTER SOFTWARE RESET REGISTER OUTLINE DIMENSIONS ORDERING GUIDE
1
Ultralow capacitance and leakage allows fast settling time
-00
SCLK SDI CS RESET/VL
936
1 pF typical off switch drain capacitance at 25°C, ±15 V
15 Figure 1.
2.6 pF typical on switch capacitance at 25°C, ±15 V <1 pC typical charge injection at 25°C 1.8 V logic compatibility with 2.7 V ≤ VL ≤ 3.3 V APPLICATIONS
In the off condition, signal levels up to the supplies are blocked.
Automated test equipment
The ultralow capacitance and charge injection of these switches
Data acquisition systems
make them ideal solutions for data acquisition and sample-and-
Battery-powered systems
hold applications where low glitch and fast settling are required.
Sample-and-hold systems
Fast switching speed coupled with high signal bandwidth make
Audio signal routing
the device suitable for video signal switching.
Video signal routing
Multifunction pin names may be referenced by their relevant
Communications systems
function only.
GENERAL DESCRIPTION PRODUCT HIGHLIGHTS
The ADGS1212 contains four independent single-pole/single- throw (SPST) switches. A serial peripheral interface (SPI) 1. SPI interface removes the need for parallel conversion, controls the switches. The SPI interface has robust error detection logic traces, and reduces the general-purpose input/output features such as cyclic redundancy check (CRC) error detection, (GPIO) channel count. invalid read/write address detection, and SCLK count error 2. Daisy-chain mode removes additional logic traces when detection. multiple devices are used. 3. CRC error detection, invalid read/write address detection, It is possible to daisy-chain multiple ADGS1212 devices together. and SCLK count error detection ensure a robust digital Daisy-chain mode enables the configuration of multiple devices interface. with minimal digital lines. The ADGS1212 can also operate in 4. CRC and error detection capabilities allow the ADGS1212 burst mode to decrease the time between SPI commands. to be used in safety critical systems. iCMOS construction ensures ultralow power dissipation, making 5. Guaranteed break-before-make switching allows the the the device ideal for portable and battery-powered instruments. ADGS1212 to be used in multiplexer configurations with Each switch conducts equally well in both directions when on, external wiring. and each switch has an input signal range that extends to the 6. The ADGS1212 1.8 V logic compatibility with 2.7 V ≤ VL ≤ supplies. 3.3 V 7. Ultralow capacitance. 8. <1 pC charge injection.
Rev. 0 Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Tel: 781.329.4700 ©2017 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. Technical Support www.analog.com
Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM PRODUCT HIGHLIGHTS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ±15 V DUAL SUPPLY 12 V SINGLE SUPPLY CONTINUOUS CURRENT PER CHANNEL, Sx OR Dx Four Channels On One Channel On TIMING CHARACTERISTICS Timing Diagrams ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TEST CIRCUITS TERMINOLOGY THEORY OF OPERATION ADDRESS MODE ERROR DETECTION FEATURES Cyclic Redundancy Check (CRC) Error Detection SCLK Count Error Detection Invalid Read/Write Address Error CLEARING THE ERROR FLAGS REGISTER BURST MODE SOFTWARE RESET DAISY-CHAIN MODE POWER-ON RESET APPLICATIONS INFORMATION BREAK-BEFORE-MAKE SWITCHING POWER SUPPLY RAILS POWER SUPPLY RECOMMENDATIONS REGISTER SUMMARY REGISTER DETAILS SWITCH DATA REGISTER ERROR CONFIGURATION REGISTER ERROR FLAGS REGISTER BURST ENABLE REGISTER SOFTWARE RESET REGISTER OUTLINE DIMENSIONS ORDERING GUIDE