Datasheet ADG5212, ADG5213 (Analog Devices) - 9
| 制造商 | Analog Devices |
| 描述 | High Voltage Latch-Up Proof, Quad SPST Switches |
| 页数 / 页 | 20 / 9 — Data Sheet. ADG5212/ADG5213. PIN CONFIGURATIONS AND FUNCTION … |
| 修订版 | A |
| 文件格式/大小 | PDF / 438 Kb |
| 文件语言 | 英语 |
Data Sheet. ADG5212/ADG5213. PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS. IN1 1. 16 IN2. D1 2. 15 D2. S1 3. 14 S2. ADG5212/. S1 1. 12 S2
该数据表的模型线
文件文字版本
Data Sheet ADG5212/ADG5213 PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS 1 1 2 2 IN1 1 16 IN2 N D I NI D 6 5 4 3 D1 2 15 D2 1 1 1 1 S1 3 14 S2 ADG5212/ S1 1 12 S2 VSS 4 13 V ADG5213 DD ADG5212/ VSS 2 11 VDD ADG5213 GND 5 TOP VIEW 12 NC (Not to Scale) GND 3 TOP VIEW 10 NC S4 6 11 S3 (Not to Scale) S4 4 9 S3 D4 7 10 D3 IN4 8 9 IN3 5 6 7 8
2 00
4 4 3 3
7-
D N N D NC = NO CONNECT
76
I I
09
NOTES
03 0
1. EXPOSED PAD TIED TO SUBSTRATE, VSS.
7-
2. NC = NO CONNECT.
76 09 Figure 2. TSSOP Pin Configuration Figure 3. LFCSP Pin Configuration
Table 7. Pin Function Descriptions Pin No. TSSOP LFCSP Mnemonic Description
1 15 IN1 Logic Control Input. 2 16 D1 Drain Terminal. This pin can be an input or an output. 3 1 S1 Source Terminal. This pin can be an input or an output. 4 2 VSS Most Negative Power Supply Potential. 5 3 GND Ground (0 V) Reference. 6 4 S4 Source Terminal. This pin can be an input or an output. 7 5 D4 Drain Terminal. This pin can be an input or an output. 8 6 IN4 Logic Control Input. 9 7 IN3 Logic Control Input. 10 8 D3 Drain Terminal. This pin can be an input or an output. 11 9 S3 Source Terminal. This pin can be an input or an output. 12 10 NC No Connect. These pins are open. 13 11 VDD Most Positive Power Supply Potential. 14 12 S2 Source Terminal. This pin can be an input or an output. 15 13 D2 Drain Terminal. This pin can be an input or an output. 16 14 IN2 Logic Control Input. N/A1 EP Exposed pad Exposed Pad. The exposed pad is connected internally. For increased reliability of the solder joints and maximum thermal capability, it is recommended that the pad be soldered to the substrate, VSS. 1 N/A means not applicable.
Table 8. ADG5212 Truth Table
ADG5212
INx Switch Condition
1 On 0 Off
Table 9. ADG5213 Truth Table ADG5213 I Nx S1, S4 S2, S3
0 Off On 1 On Off Rev. A | Page 9 of 20 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAMS GENERAL DESCRIPTION PRODUCT HIGHLIGHTS REVISION HISTORY SPECIFICATIONS ±15 V DUAL SUPPLY ±20 V DUAL SUPPLY 12 V SINGLE SUPPLY 36 V SINGLE SUPPLY CONTINUOUS CURRENT PER CHANNEL, Sx OR Dx ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TEST CIRCUITS TERMINOLOGY TRENCH ISOLATION APPLICATIONS INFORMATION OUTLINE DIMENSIONS ORDERING GUIDE
2 00
4 4 3 3
7-
D N N D NC = NO CONNECT
76
I I
09
NOTES
03 0
1. EXPOSED PAD TIED TO SUBSTRATE, VSS.
7-
2. NC = NO CONNECT.
76 09 Figure 2. TSSOP Pin Configuration Figure 3. LFCSP Pin Configuration
Table 7. Pin Function Descriptions Pin No. TSSOP LFCSP Mnemonic Description
1 15 IN1 Logic Control Input. 2 16 D1 Drain Terminal. This pin can be an input or an output. 3 1 S1 Source Terminal. This pin can be an input or an output. 4 2 VSS Most Negative Power Supply Potential. 5 3 GND Ground (0 V) Reference. 6 4 S4 Source Terminal. This pin can be an input or an output. 7 5 D4 Drain Terminal. This pin can be an input or an output. 8 6 IN4 Logic Control Input. 9 7 IN3 Logic Control Input. 10 8 D3 Drain Terminal. This pin can be an input or an output. 11 9 S3 Source Terminal. This pin can be an input or an output. 12 10 NC No Connect. These pins are open. 13 11 VDD Most Positive Power Supply Potential. 14 12 S2 Source Terminal. This pin can be an input or an output. 15 13 D2 Drain Terminal. This pin can be an input or an output. 16 14 IN2 Logic Control Input. N/A1 EP Exposed pad Exposed Pad. The exposed pad is connected internally. For increased reliability of the solder joints and maximum thermal capability, it is recommended that the pad be soldered to the substrate, VSS. 1 N/A means not applicable.
Table 8. ADG5212 Truth Table
ADG5212
INx Switch Condition
1 On 0 Off
Table 9. ADG5213 Truth Table ADG5213 I Nx S1, S4 S2, S3
0 Off On 1 On Off Rev. A | Page 9 of 20 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAMS GENERAL DESCRIPTION PRODUCT HIGHLIGHTS REVISION HISTORY SPECIFICATIONS ±15 V DUAL SUPPLY ±20 V DUAL SUPPLY 12 V SINGLE SUPPLY 36 V SINGLE SUPPLY CONTINUOUS CURRENT PER CHANNEL, Sx OR Dx ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TEST CIRCUITS TERMINOLOGY TRENCH ISOLATION APPLICATIONS INFORMATION OUTLINE DIMENSIONS ORDERING GUIDE