数据表Datasheet ADG5404 (Analog Devices)
Datasheet ADG5404 (Analog Devices)
制造商 | Analog Devices |
描述 | High Voltage, Latch-up Proof, 4-Channel Multiplexer |
页数 / 页 | 20 / 1 — High Voltage, Latch-up Proof,. 4-Channel Multiplexer. Data Sheet. … |
修订版 | B |
文件格式/大小 | PDF / 536 Kb |
文件语言 | 英语 |
High Voltage, Latch-up Proof,. 4-Channel Multiplexer. Data Sheet. ADG5404. FEATURES. FUNCTIONAL BLOCK DIAGRAM. Latch-up proof
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High Voltage, Latch-up Proof, 4-Channel Multiplexer Data Sheet ADG5404 FEATURES FUNCTIONAL BLOCK DIAGRAM Latch-up proof ADG5404 8 kV HBM ESD rating S1 Low on resistance (<10 Ω) S2 ±9 V to ±22 V dual-supply operation D S3 9 V to 40 V single-supply operation S4 48 V supply maximum ratings 1 OF 4 Fully specified at ±15 V, ±20 V, +12 V, and +36 V DECODER
1 0
V
0
SS to VDD analog signal range
3-
A0 A1 EN
20 09 Figure 1.
APPLICATIONS Relay replacement Automatic test equipment Data acquisition Instrumentation Avionics Audio and video switching Communication systems GENERAL DESCRIPTION PRODUCT HIGHLIGHTS
The ADG5404 is a complementary metal-oxide semiconductor 1. Trench Isolation Guards Against Latch-Up. A dielectric (CMOS) analog multiplexer, comprising four single channels. trench separates the P and N channel transistors, thereby The on-resistance profile is very flat over the full analog input preventing latch-up even under severe overvoltage range, ensuring excellent linearity and low distortion when conditions. switching audio signals. 2. Low RON. 3. Dual-Supply Operation. For applications where the analog The ADG5404 is designed on a trench process, which guards signal is bipolar, the ADG5404 can be operated from dual against latch-up. A dielectric trench separates the P and N supplies of up to ±22 V. channel transistors, thereby preventing latch-up even under 4. Single-Supply Operation. For applications where the severe overvoltage conditions. analog signal is unipolar, the ADG5404 can be operated The ADG5404 switches one of four inputs to a common output, from a single-rail power supply of up to 40 V. D, as determined by the 3-bit binary address lines, A0, A1, and 5. 3 V logic-compatible digital inputs: VINH = 2.0 V, VINL = 0.8 V. EN. Logic 0 on the EN pin disables the device. Each switch 6. No VL logic power supply required. conducts equally well in both directions when on and has an input signal range that extends to the supplies. In the off condi- tion, signal levels up to the supplies are blocked. All switches exhibit break-before-make switching action.
Rev. B Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Tel: 781.329.4700 ©2010–2017 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. Technical Support www.analog.com
Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION PRODUCT HIGHLIGHTS REVISION HISTORY SPECIFICATIONS ±15 V DUAL SUPPLY ±20 V DUAL SUPPLY +12 V SINGLE SUPPLY +36 V SINGLE SUPPLY CONTINUOUS CURRENT PER CHANNEL, S OR D ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TRUTH TABLE TYPICAL PERFORMANCE CHARACTERISTICS TEST CIRCUITS TERMINOLOGY TRENCH ISOLATION APPLICATIONS INFORMATION OUTLINE DIMENSIONS ORDERING GUIDE