Datasheet ADG1633, ADG1634 (Analog Devices) - 9
| 制造商 | Analog Devices |
| 描述 | 4.5 Ω RON, Triple/Quad SPDT ±5 V, +12 V, +5 V, and +3.3 V Switches |
| 页数 / 页 | 19 / 9 — Data Sheet. ADG1633/ADG1634. PIN CONFIGURATIONS AND FUNCTION … |
| 修订版 | B |
| 文件格式/大小 | PDF / 445 Kb |
| 文件语言 | 英语 |
Data Sheet. ADG1633/ADG1634. PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS. N1I. GND. D1 1. 12 EN. S1A. IN1. S1B 2. 11 V. AD1633. TOP VIEW. S2B 3
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文件文字版本
Data Sheet ADG1633/ADG1634 PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS 1A DD ND S V G N1I 16 15 14 13 V 1 16 DD GND D1 1 12 EN S1A 2 15 IN1 S1B 2 11 V AD1633 SS D1 3 14 EN TOP VIEW S2B 3 10 S3B (Not to Scale) S1B 4 ADG1633 13 VSS D2 4 9 D3 TOP VIEW S2B 5 12 S3B (Not to Scale) D2 6 11 D3 5 6 7 8 S2A 2A N2 N3 3A 7 10 S3A S I I S IN2 8 9 IN3
004 005
NOTES 1. EXPOSED PAD IS TIED TO THE SUBSTRATE, V
08319-
SS.
08319- Figure 4. ADG1633 TSSOP Pin Configuration Figure 5. ADG1633 LFCSP Pin Configuration
Table 8. ADG1633 P in Function Descriptions Pin No. TSSOP LFCSP Mnemonic Description
1 15 VDD Most Positive Power Supply Potential. 2 16 S1A Source Terminal 1A. Can be an input or an output. 3 1 D1 Drain Terminal 1. Can be an input or an output. 4 2 S1B Source Terminal 1B. Can be an input or an output. 5 3 S2B Source Terminal 2B. Can be an input or an output. 6 4 D2 Drain Terminal 2. Can be an input or an output. 7 5 S2A Source Terminal 2A. Can be an input or an output. 8 6 IN2 Logic Control Input 2. 9 7 IN3 Logic Control Input 3. 10 8 S3A Source Terminal 3A. Can be an input or an output. 11 9 D3 Drain Terminal 3. Can be an input or an output. 12 10 S3B Source Terminal 3B. Can be an input or an output. 13 11 VSS Most Negative Power Supply Potential. In single-supply applications, this pin can be connected to ground. 14 12 EN Active Low Digital Input. When this pin is high, the device is disabled and all switches are off. When this pin is low, INx logic inputs determine the on switches. 15 13 IN1 Logic Control Input 1. 16 14 GND Ground (0 V) Reference. N/A 17 EP Exposed Pad. The exposed pad is tied to the substrate, VSS.
Table 9. ADG1633 Tr uth Table EN INx SxA SxB
1 X1 Off Off 0 0 Off On 0 1 On Off 1 X = don’t care. Rev. B | Page 9 of 19 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAMS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ±5 V DUAL SUPPLY 12 V SINGLE SUPPLY 5 V SINGLE SUPPLY 3.3 V SINGLE SUPPLY CONTINUOUS CURRENT PER CHANNEL, S OR D ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TEST CIRCUITS TERMINOLOGY OUTLINE DIMENSIONS ORDERING GUIDE
004 005
NOTES 1. EXPOSED PAD IS TIED TO THE SUBSTRATE, V
08319-
SS.
08319- Figure 4. ADG1633 TSSOP Pin Configuration Figure 5. ADG1633 LFCSP Pin Configuration
Table 8. ADG1633 P in Function Descriptions Pin No. TSSOP LFCSP Mnemonic Description
1 15 VDD Most Positive Power Supply Potential. 2 16 S1A Source Terminal 1A. Can be an input or an output. 3 1 D1 Drain Terminal 1. Can be an input or an output. 4 2 S1B Source Terminal 1B. Can be an input or an output. 5 3 S2B Source Terminal 2B. Can be an input or an output. 6 4 D2 Drain Terminal 2. Can be an input or an output. 7 5 S2A Source Terminal 2A. Can be an input or an output. 8 6 IN2 Logic Control Input 2. 9 7 IN3 Logic Control Input 3. 10 8 S3A Source Terminal 3A. Can be an input or an output. 11 9 D3 Drain Terminal 3. Can be an input or an output. 12 10 S3B Source Terminal 3B. Can be an input or an output. 13 11 VSS Most Negative Power Supply Potential. In single-supply applications, this pin can be connected to ground. 14 12 EN Active Low Digital Input. When this pin is high, the device is disabled and all switches are off. When this pin is low, INx logic inputs determine the on switches. 15 13 IN1 Logic Control Input 1. 16 14 GND Ground (0 V) Reference. N/A 17 EP Exposed Pad. The exposed pad is tied to the substrate, VSS.
Table 9. ADG1633 Tr uth Table EN INx SxA SxB
1 X1 Off Off 0 0 Off On 0 1 On Off 1 X = don’t care. Rev. B | Page 9 of 19 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAMS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ±5 V DUAL SUPPLY 12 V SINGLE SUPPLY 5 V SINGLE SUPPLY 3.3 V SINGLE SUPPLY CONTINUOUS CURRENT PER CHANNEL, S OR D ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TEST CIRCUITS TERMINOLOGY OUTLINE DIMENSIONS ORDERING GUIDE