Datasheet ADG1208, ADG1209 (Analog Devices)

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Low Capacitance, 4-/8-Channel, ±15 V/+12 V i CMOS Multiplexers Data Sheet ADG1208/ ADG1209 FEATURES FUNCTIONAL BLOCK DIAGRAMS <1 pC charge injection over full signal range ADG1208 ADG1209 1 pF off capacitance S1 S1A 33 V supply range DA 120 Ω on resistance S4A Fully specified at ±15 V/+12 V D 3 V logic compatible inputs Rail-to-rail operation S1B DB Break-before-make switching action S8 S4B Available in a 16-lead TSSOP, a 16-lead LFCSP, and a 16-lead SOIC 1-OF-8 1-OF-4 DECODER DECODER Typical power consumption < 0.03 µW
001
APPLICATIONS A0 A1 A2 EN A0 A1 EN
05713-
Audio and video routing
Figure 1.
Automatic test equipment Data-acquisition systems Battery-powered systems Sample-and-hold systems Communication systems GENERAL DESCRIPTION
The ADG1208 and ADG1209 are monolithic, iCMOS® analog The ultralow capacitance and exceptionally low charge injection multiplexers comprising eight single channels and four differential of these multiplexers make them ideal solutions for data acquisition channels, respectively. The ADG1208 switches one of eight inputs and sample-and-hold applications, where low glitch and fast to a common output as determined by the 3-bit binary address settling are required. Figure 2 shows that there is minimum lines A0, A1, and A2. The ADG1209 switches one of four charge injection over the entire signal range of the device. differential inputs to a common differential output as determined iCMOS construction also ensures ultralow power dissipation, by the 2-bit binary address lines A0 and A1. An EN input on making the devices ideally suited for portable and battery- both devices enable or disable the device. When disabled, all powered instruments. channels are switched off. When on, each channel conducts
1.0
equally well in both directions and has an input signal range
MUX (SOURCE TO DRAIN) 0.9 TA = 25°C
that extends to the supplies.
0.8
The industrial CMOS (iCMOS) modular manufacturing
C) p 0.7
process combines high voltage complementary metal-oxide
N (
semiconductor (CMOS) and bipolar technologies. It enables the
IO 0.6 CT VDD = +15V
development of a wide range of high performance analog ICs
0.5 VSS = –15V NJE I
capable of 33 V operation in a footprint that no other generation
E 0.4
of high voltage devices has been able to achieve. Unlike analog
0.3 VDD = +12V
ICs using conventional CMOS processes, iCMOS components
CHARG VSS = 0V 0.2
can tolerate high supply voltages while providing increased
0.1 V
performance, dramatically lower power consumption, and
DD = +5V VSS = –5V
reduced package size.
0 –15 –10 –5 0 5 10 15
051
V S (V)
05713- Figure 2. Source to Drain Charge Injection vs. Source Voltage
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Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAMS GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS DUAL SUPPLY SINGLE SUPPLY ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TERMINOLOGY TEST CIRCUITS OUTLINE DIMENSIONS ORDERING GUIDE