Datasheet ADG613-EP (Analog Devices) - 4
| 制造商 | Analog Devices |
| 描述 | 1 pC Charge Injection, 100 pA Leakage, CMOS, ±5 V/ +5 V/ +3 V, Quad SPST Switches |
| 页数 / 页 | 12 / 4 — ADG613-EP. Enhanced Product. SINGLE-SUPPLY OPERATION. Table 2. Parameter. … |
| 修订版 | A |
| 文件格式/大小 | PDF / 258 Kb |
| 文件语言 | 英语 |
ADG613-EP. Enhanced Product. SINGLE-SUPPLY OPERATION. Table 2. Parameter. 25°C. −55°C to +125°C. Unit. Test Conditions/Comments
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ADG613-EP Enhanced Product SINGLE-SUPPLY OPERATION
VDD = 5 V ± 10%, VSS = 0 V, GND = 0 V, unless otherwise noted. VS is the source voltage. VD is the drain voltage.
Table 2. Parameter 25°C −55°C to +125°C Unit Test Conditions/Comments
ANALOG SWITCH Analog Signal Range 0 to VDD V On Resistance, RON 210 Ω typ VS = 3.5 V, IS = −1 mA; see Figure 14 290 380 Ω max VS = 3.5 V, IS = −1 mA; see Figure 14 On-Resistance Match 3 Ω typ VS = 3.5 V, IS = −1 mA Between Channels, ΔRON 10 13 Ω max VS = 3.5 V, IS = −1 mA LEAKAGE CURRENTS VDD = 5.5 V Source Off Leakage, IS(OFF) ±0.01 nA typ VS = 1 V or 4.5 V, VD = 4.5 V or 1 V; see Figure 15 ±0.1 ±2 nA max VS = 1 V or 4.5 V, VD = 4.5 V or 1 V; see Figure 15 Drain Off Leakage, ID(OFF) ±0.01 nA typ VS = 1 V or 4.5 V, VD = 4.5 V or 1 V; see Figure 15 ±0.1 ±2 nA max VS = 1 V or 4.5 V, VD = 4.5 V or 1 V; see Figure 15 Channel On Leakage, ID(ON), IS(ON) ±0.01 nA typ VS = VD = 1 V or 4.5 V; see Figure 16 ±0.1 ±6 nA max VS = VD = 1 V or 4.5 V; see Figure 16 DIGITAL INPUTS Input High Voltage, VINH 2.4 V min Input Low Voltage, VINL 0.8 V max Input Current, IINL or IINH 0.005 μA typ VIN = VINL or VINH ±0.1 μA max VIN = VINL or VINH Digital Input Capacitance, CIN 2 pF typ DYNAMIC CHARACTERISTICS1 tON 70 ns typ RL = 300 Ω, CL = 35 pF, VS = 3.0 V; see Figure 17 100 150 ns max RL = 300 Ω, CL = 35 pF, VS = 3.0 V; see Figure 17 tOFF 25 ns typ RL = 300 Ω, CL = 35 pF, VS = 3.0 V; see Figure 17 40 50 ns max RL = 300 Ω, CL = 35 pF, VS = 3.0 V; see Figure 17 Break-Before-Make Time Delay, tBBM 25 ns typ RL = 300 Ω, CL = 35 pF, VS1 = VS2 = 3.0 V; see Figure 18 10 ns min RL = 300 Ω, CL = 35 pF, VS1 = VS2 = 3.0 V; see Figure 18 Charge Injection 1 pC typ VS = 0 V, RS = 0 Ω, CL = 1 nF; see Figure 19 Off Isolation −62 dB typ RL = 50 Ω, CL = 5 pF, f = 10 MHz; see Figure 20 Channel to Channel Crosstalk −90 dB typ RL = 50 Ω, CL = 5 pF, f = 10 MHz; see Figure 21 −3 dB Bandwidth 680 MHz typ RL = 50 Ω, CL = 5 pF; see Figure 22 CS(OFF) 5 pF typ f = 1 MHz CD(OFF) 5 pF typ f = 1 MHz CD(ON), CS(ON) 5 pF typ f = 1 MHz POWER REQUIREMENTS VDD = 5.5 V IDD 0.001 μA typ Digital inputs = 0 V or 5.5 V 1.0 μA max Digital inputs = 0 V or 5.5 V VDD 2.7 V min 5.5 V max Power Consumption 5.5 nW typ 5.5 µW max 1 Guaranteed by design; not subject to production test. Rev. A | Page 4 of 12 Document Outline FEATURES ENHANCED PRODUCT FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION PRODUCT HIGHLIGHTS REVISION HISTORY SPECIFICATIONS DUAL-SUPPLY OPERATION SINGLE-SUPPLY OPERATION ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TEST CIRCUITS OUTLINE DIMENSIONS ORDERING GUIDE
ADG613-EP Enhanced Product SINGLE-SUPPLY OPERATION
VDD = 5 V ± 10%, VSS = 0 V, GND = 0 V, unless otherwise noted. VS is the source voltage. VD is the drain voltage.
Table 2. Parameter 25°C −55°C to +125°C Unit Test Conditions/Comments
ANALOG SWITCH Analog Signal Range 0 to VDD V On Resistance, RON 210 Ω typ VS = 3.5 V, IS = −1 mA; see Figure 14 290 380 Ω max VS = 3.5 V, IS = −1 mA; see Figure 14 On-Resistance Match 3 Ω typ VS = 3.5 V, IS = −1 mA Between Channels, ΔRON 10 13 Ω max VS = 3.5 V, IS = −1 mA LEAKAGE CURRENTS VDD = 5.5 V Source Off Leakage, IS(OFF) ±0.01 nA typ VS = 1 V or 4.5 V, VD = 4.5 V or 1 V; see Figure 15 ±0.1 ±2 nA max VS = 1 V or 4.5 V, VD = 4.5 V or 1 V; see Figure 15 Drain Off Leakage, ID(OFF) ±0.01 nA typ VS = 1 V or 4.5 V, VD = 4.5 V or 1 V; see Figure 15 ±0.1 ±2 nA max VS = 1 V or 4.5 V, VD = 4.5 V or 1 V; see Figure 15 Channel On Leakage, ID(ON), IS(ON) ±0.01 nA typ VS = VD = 1 V or 4.5 V; see Figure 16 ±0.1 ±6 nA max VS = VD = 1 V or 4.5 V; see Figure 16 DIGITAL INPUTS Input High Voltage, VINH 2.4 V min Input Low Voltage, VINL 0.8 V max Input Current, IINL or IINH 0.005 μA typ VIN = VINL or VINH ±0.1 μA max VIN = VINL or VINH Digital Input Capacitance, CIN 2 pF typ DYNAMIC CHARACTERISTICS1 tON 70 ns typ RL = 300 Ω, CL = 35 pF, VS = 3.0 V; see Figure 17 100 150 ns max RL = 300 Ω, CL = 35 pF, VS = 3.0 V; see Figure 17 tOFF 25 ns typ RL = 300 Ω, CL = 35 pF, VS = 3.0 V; see Figure 17 40 50 ns max RL = 300 Ω, CL = 35 pF, VS = 3.0 V; see Figure 17 Break-Before-Make Time Delay, tBBM 25 ns typ RL = 300 Ω, CL = 35 pF, VS1 = VS2 = 3.0 V; see Figure 18 10 ns min RL = 300 Ω, CL = 35 pF, VS1 = VS2 = 3.0 V; see Figure 18 Charge Injection 1 pC typ VS = 0 V, RS = 0 Ω, CL = 1 nF; see Figure 19 Off Isolation −62 dB typ RL = 50 Ω, CL = 5 pF, f = 10 MHz; see Figure 20 Channel to Channel Crosstalk −90 dB typ RL = 50 Ω, CL = 5 pF, f = 10 MHz; see Figure 21 −3 dB Bandwidth 680 MHz typ RL = 50 Ω, CL = 5 pF; see Figure 22 CS(OFF) 5 pF typ f = 1 MHz CD(OFF) 5 pF typ f = 1 MHz CD(ON), CS(ON) 5 pF typ f = 1 MHz POWER REQUIREMENTS VDD = 5.5 V IDD 0.001 μA typ Digital inputs = 0 V or 5.5 V 1.0 μA max Digital inputs = 0 V or 5.5 V VDD 2.7 V min 5.5 V max Power Consumption 5.5 nW typ 5.5 µW max 1 Guaranteed by design; not subject to production test. Rev. A | Page 4 of 12 Document Outline FEATURES ENHANCED PRODUCT FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION PRODUCT HIGHLIGHTS REVISION HISTORY SPECIFICATIONS DUAL-SUPPLY OPERATION SINGLE-SUPPLY OPERATION ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TEST CIRCUITS OUTLINE DIMENSIONS ORDERING GUIDE