Datasheet ADG706, ADG707 (Analog Devices) - 4
| 制造商 | Analog Devices |
| 描述 | CMOS, +1.8 V to +5.5 V/ⴞ2.5 V, 2.5 ⍀ Low-Voltage, 8-/16-Channel Multiplexers |
| 页数 / 页 | 12 / 4 — ADG706/ADG707. DUAL SUPPLY1 (VDD = +2.5 V. 10%, VSS = –2.5 V. 10%, GND = … |
| 修订版 | B |
| 文件格式/大小 | PDF / 263 Kb |
| 文件语言 | 英语 |
ADG706/ADG707. DUAL SUPPLY1 (VDD = +2.5 V. 10%, VSS = –2.5 V. 10%, GND = 0 V, unless otherwise noted.). –40. Parameter. to +85. Unit
该数据表的模型线
文件文字版本
ADG706/ADG707 DUAL SUPPLY1 (VDD = +2.5 V
ⴞ
10%, VSS = –2.5 V
ⴞ
10%, GND = 0 V, unless otherwise noted.) –40
ⴗ
C Parameter 25
ⴗ
C to +85
ⴗ
C Unit Test Conditions/Comments
ANALOG SWITCH Analog Signal Range VSS to VDD V ON Resistance (RON) 2.5 Ω typ VS = VSS to VDD, IDS = 10 mA; 4.5 5 Ω max Test Circuit 1 ON Resistance Match Between 0.3 Ω typ VS = VSS to VDD, IDS = 10 mA Channels (∆RON) 0.8 Ω max ON Resistance Flatness (RFLAT(ON)) 0.5 Ω typ VS = VSS to VDD, IDS = 10 mA 1.2 Ω max LEAKAGE CURRENTS VDD = +2.75 V, VSS = –2.75 V Source OFF Leakage IS (OFF) ±0.01 nA typ VS = +2.25 V/–1.25 V, VD = –1.25 V/+2.25 V; ±0.1 ±0.3 nA max Test Circuit 2 Drain OFF Leakage ID (OFF) ±0.01 nA typ VS = +2.25 V/–1.25 V, VD = –1.25 V/+2.25 V; ADG706 ±0.4 ±1.5 nA max Test Circuit 3 ADG707 ±0.2 ±1 nA max Channel ON Leakage ID, IS (ON) ±0.01 nA typ VS = VD = +2.25 V/–1.25 V, Test Circuit 4 ADG706 ±0.4 ±1.5 nA max ADG707 ±0.2 ±1 nA max DIGITAL INPUTS Input High Voltage, VINH 1.7 V min Input Low Voltage, VINL 0.7 V max Input Current IINL or IINH 0.005 µA typ VIN = VINL or VINH ±0.1 µA max CIN, Digital Input Capacitance 5 pF typ DYNAMIC CHARACTERISTICS2 tTRANSITION 40 ns typ RL = 300 Ω, CL = 35 pF, Test Circuit 5 60 ns max VS1 = 1.5 V/0 V, VS16 = 0 V/1.5 V Break-Before-Make Time Delay, tD 15 ns typ RL = 300 Ω, CL = 35 pF; 1 ns min VS = 1.5 V, Test Circuit 6 tON (EN) 32 ns typ RL = 300 Ω, CL = 35 pF; 50 ns max VS = 1.5 V, Test Circuit 7 tOFF (EN) 16 ns typ RL = 300 Ω, CL = 35 pF; 26 ns max VS = 1.5 V, Test Circuit 7 Charge Injection ±8 pC typ VS = 0 V, RS = 0 Ω, CL = 1 nF; Test Circuit 8 OFF Isolation –60 dB typ RL = 50 Ω, CL = 5 pF, f = 10 MHz; –80 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz; Test Circuit 9 Channel-to-Channel Crosstalk –60 dB typ RL = 50 Ω, CL = 5 pF, f = 10 MHz; –80 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz; Test Circuit 10 –3 dB Bandwidth ADG706 25 MHz typ RL = 50 Ω, CL = 5 pF, Test Circuit 9 ADG707 36 MHz typ RL = 50 Ω, CL = 5 pF, Test Circuit 9 CS (OFF) 13 pF typ f = 1 MHz CD (OFF) ADG706 180 pF typ f = 1 MHz ADG707 90 pF typ f = 1 MHz CD, CS (ON) ADG706 200 pF typ f = 1 MHz ADG707 100 pF typ f = 1 MHz POWER REQUIREMENTS IDD 0.001 µA typ VDD = +2.75 V 1.0 µA max Digital Inputs = 0 V or 2.75 V ISS 0.001 µA typ VSS = –2.75 V 1.0 µA max Digital Inputs = 0 V or 2.75 V NOTES 1Temperature range is –40°C to +85°C. 2Guaranteed by design, not subject to production test. Specifications subject to change without notice. –4– REV. B
ⴞ
10%, VSS = –2.5 V
ⴞ
10%, GND = 0 V, unless otherwise noted.) –40
ⴗ
C Parameter 25
ⴗ
C to +85
ⴗ
C Unit Test Conditions/Comments
ANALOG SWITCH Analog Signal Range VSS to VDD V ON Resistance (RON) 2.5 Ω typ VS = VSS to VDD, IDS = 10 mA; 4.5 5 Ω max Test Circuit 1 ON Resistance Match Between 0.3 Ω typ VS = VSS to VDD, IDS = 10 mA Channels (∆RON) 0.8 Ω max ON Resistance Flatness (RFLAT(ON)) 0.5 Ω typ VS = VSS to VDD, IDS = 10 mA 1.2 Ω max LEAKAGE CURRENTS VDD = +2.75 V, VSS = –2.75 V Source OFF Leakage IS (OFF) ±0.01 nA typ VS = +2.25 V/–1.25 V, VD = –1.25 V/+2.25 V; ±0.1 ±0.3 nA max Test Circuit 2 Drain OFF Leakage ID (OFF) ±0.01 nA typ VS = +2.25 V/–1.25 V, VD = –1.25 V/+2.25 V; ADG706 ±0.4 ±1.5 nA max Test Circuit 3 ADG707 ±0.2 ±1 nA max Channel ON Leakage ID, IS (ON) ±0.01 nA typ VS = VD = +2.25 V/–1.25 V, Test Circuit 4 ADG706 ±0.4 ±1.5 nA max ADG707 ±0.2 ±1 nA max DIGITAL INPUTS Input High Voltage, VINH 1.7 V min Input Low Voltage, VINL 0.7 V max Input Current IINL or IINH 0.005 µA typ VIN = VINL or VINH ±0.1 µA max CIN, Digital Input Capacitance 5 pF typ DYNAMIC CHARACTERISTICS2 tTRANSITION 40 ns typ RL = 300 Ω, CL = 35 pF, Test Circuit 5 60 ns max VS1 = 1.5 V/0 V, VS16 = 0 V/1.5 V Break-Before-Make Time Delay, tD 15 ns typ RL = 300 Ω, CL = 35 pF; 1 ns min VS = 1.5 V, Test Circuit 6 tON (EN) 32 ns typ RL = 300 Ω, CL = 35 pF; 50 ns max VS = 1.5 V, Test Circuit 7 tOFF (EN) 16 ns typ RL = 300 Ω, CL = 35 pF; 26 ns max VS = 1.5 V, Test Circuit 7 Charge Injection ±8 pC typ VS = 0 V, RS = 0 Ω, CL = 1 nF; Test Circuit 8 OFF Isolation –60 dB typ RL = 50 Ω, CL = 5 pF, f = 10 MHz; –80 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz; Test Circuit 9 Channel-to-Channel Crosstalk –60 dB typ RL = 50 Ω, CL = 5 pF, f = 10 MHz; –80 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz; Test Circuit 10 –3 dB Bandwidth ADG706 25 MHz typ RL = 50 Ω, CL = 5 pF, Test Circuit 9 ADG707 36 MHz typ RL = 50 Ω, CL = 5 pF, Test Circuit 9 CS (OFF) 13 pF typ f = 1 MHz CD (OFF) ADG706 180 pF typ f = 1 MHz ADG707 90 pF typ f = 1 MHz CD, CS (ON) ADG706 200 pF typ f = 1 MHz ADG707 100 pF typ f = 1 MHz POWER REQUIREMENTS IDD 0.001 µA typ VDD = +2.75 V 1.0 µA max Digital Inputs = 0 V or 2.75 V ISS 0.001 µA typ VSS = –2.75 V 1.0 µA max Digital Inputs = 0 V or 2.75 V NOTES 1Temperature range is –40°C to +85°C. 2Guaranteed by design, not subject to production test. Specifications subject to change without notice. –4– REV. B