Datasheet ADG508F, ADG509F (Analog Devices)

8-Channel/4-Channel Fault-Protected Analog Multiplexers ADG508F/ ADG509F FEATURES FUNCTIONAL BLOCK DIAGRAMS All switches off with power supply off ADG508F Analog output of on channel clamped within power supplies if an overvoltage occurs S1 Latch-up proof construction Low on resistance (270 Ω typical) Fast switching times D tON: 230 ns maximum tOFF: 130 ns maximum Low power dissipation (3.3 mW maximum) S8 Fault and overvoltage protection (−40 V to +55 V) 1 OF 8 Break-before-make construction DECODER TTL and CMOS compatible inputs
1 00
APPLICATIONS
5-
A0 A1 A2 EN
03 00
Existing multiplexer applications (both fault-protected and
Figure 1.
nonfault-protected) ADG509F New designs requiring multiplexer functions GENERAL DESCRIPTION S1A DA
The ADG508F and ADG509F are CMOS analog multi-
S4A
plexers, with the ADG508F comprising eight single channels and the ADG509F comprising four differential channels. These multiplexers provide fault protection. Using a series n-channel,
S1B DB
p-channel, n-channel MOSFET structure, both device and signal
S4B
source protection is provided in the event of an overvoltage or power loss. The multiplexer can withstand continuous overvolt-
1 OF 4 DECODER
age inputs from −40 V to +55 V. During fault conditions with 1 power supplies off, the multiplexer input (or output) appears as 10 5-
A0 A1 EN
03 an open circuit and only a few nanoamperes of leakage current 00 Figure 2. will flow. This protects not only the multiplexer and the circuitry driven by the multiplexer, but also protects the sensors or signal
PRODUCT HIGHLIGHTS
sources that drive the multiplexer. 1. Fault protection. The ADG508F/ADG509F can withstand The ADG508F switches one of eight inputs to a common output continuous voltage inputs from −40 V to +55 V. When a as determined by the 3-bit binary address lines A0, A1, and A2. fault occurs due to the power supplies being turned off, all The ADG509F switches one of four differential inputs to a the channels are turned off and only a leakage current of a common differential output as determined by the 2-bit binary few nanoamperes flows. address lines A0 and A1. An EN input on each device is used 2. On channel saturates while fault exists. to enable or disable the device. When disabled, all channels are 3. Low RON. switched off. 4. Fast switching times. 5. Break-before-make switching. Switches are guaranteed break-before-make so that input signals are protected against momentary shorting. 6. Trench isolation eliminates latch-up. A dielectric trench separates the p and n-channel MOSFETs thereby preventing latch-up.
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Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAMS PRODUCT HIGHLIGHTS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS DUAL SUPPLY TRUTH TABLES ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TERMINOLOGY THEORY OF OPERATION TEST CIRCUITS OUTLINE DIMENSIONS ORDERING GUIDE