Datasheet ADG419 (Analog Devices) - 9

ADG419 TEST CIRCUITS IDS V1 S D IS (OFF) ID (OFF) I S D D (ON) S D A A A VS
1 2 3 01
V
01
R S VD VS VD
01
ON = V1/IDS
0- 0- 0- 85 85 85 07 07 07 Figure 11. On Resistance Figure 12. Off Leakage Figure 13. On Leakage
+15V +5V 3V V V V DD L IN 50% 50% S1 D 0V VS1 VOUT tTRANSITION tTRANSITION V S2 S2 RL CL 300Ω 35pF IN 90% OUTPUT VIN V GND SS 90%
4 -01
–15V
850 07 Figure 14. Transition Time, tTRANSITION
+15V +5V V V DD L 3V S1 D VS1 VOUT ADDRESS DRIVE (VIN) V S2 S2 RL CL 0V 300Ω 35pF IN tD tD VOUT V V 0.9V 0.9V IN GND SS O 0.9VO 0.9VO O
15 -0
–15V
50 78 0 Figure 15. Break-Before-Make Time Delay, tD Rev. B | Page 9 of 16 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM PRODUCT HIGHLIGHTS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS DUAL SUPPLY SINGLE SUPPLY ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TEST CIRCUITS TERMINOLOGY OUTLINE DIMENSIONS ORDERING GUIDE