Datasheet ADG508A, ADG509A (Analog Devices) - 8
| 制造商 | Analog Devices |
| 描述 | CMOS 4-/8-Channel Analog Multiplexers |
| 页数 / 页 | 16 / 8 — ADG508A/ADG509A. PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS. 20 19. A0 … |
| 修订版 | D |
| 文件格式/大小 | PDF / 390 Kb |
| 文件语言 | 英语 |
ADG508A/ADG509A. PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS. 20 19. A0 1. 16 A1. 18 GND. PIN 1. 15 A2. IDENTIFIER. S1 5. 17 V. 14 GND
该数据表的模型线
文件文字版本
link to page 8
ADG508A/ADG509A PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS EN A0 NC A1 A2 EN A0 NC A1 A2 3 2 1 20 19 3 2 1 20 19 A0 1 16 A1 V 4 18 GND V 4 PIN 1 18 GND EN SS 2 15 A2 SS IDENTIFIER S1 5 17 V S1 5 17 V V DD DD SS 3 14 GND ADG508A ADG508A NC 6 16 NC ADG508A S1 NC 6 16 NC 4 TOP VIEW 13 V TOP VIEW DD TOP VIEW (Not to Scale) S2 7 (Not to Scale) 15 S5 (Not to Scale) S2 5 S2 S5 12 S5 7 15 S3 8 14 S6 S3 6 11 S6 S3 8 14 S6 S4 7 10 S7
3 4 5
9
-00
9 10 11 12 13
00
10 11 12 13 NC = NO CONNECT
-00
D NC = NO CONNECT
1-
8 9 S8
51
D S4
05
NC S8 S7 S4 D
051 0 000 00
NC S8 S7
0 Figure 3. ADG508A DIP, SOIC Figure 4. ADG508A LCC Figure 5. ADG508A PLCC
Table 4. ADG508A Pin Function Description Pin Number DIP/SOIC PLCC/LCC Mnemonic Description
1 2 A0 Logic Control Input. 2 3 EN Active High Digital Input. When low, the device is disabled and all switches are off. When high, Ax logic inputs determine on switches. 3 4 VSS Most Negative Power Supply Potential in Dual Supplies. In single-supply applications, it can be connected to ground. 4 5 S1 Source Terminal 1. Can be an input or an output. 5 7 S2 Source Terminal 2. Can be an input or an output. 6 8 S3 Source Terminal 3. Can be an input or an output. 7 9 S4 Source Terminal 4. Can be an input or an output. 8 10 D Drain Terminal. Can be an input or an output. 9 12 S8 Source Terminal 8. Can be an input or an output. 10 13 S7 Source Terminal 7. Can be an input or an output. 11 14 S6 Source Terminal 6. Can be an input or an output. 12 15 S5 Source Terminal 5. Can be an input or an output. 13 17 VDD Most Positive Power Supply Potential. 14 18 GND Ground (0 V) Reference. 15 19 A2 Logic Control Input. 16 20 A1 Logic Control Input. N/A 1 NC No Connect. N/A 6 NC No Connect. N/A 11 NC No Connect. N/A 16 NC No Connect.
Table 5. ADG508A Truth Table A2 A1 A0 EN On Switch
X1 X1 X1 0 None X 0 0 0 1 1 0 0 1 1 2 0 1 0 1 3 0 1 1 1 4 1 0 0 1 5 1 0 1 1 6 1 1 0 1 7 1 1 1 1 8 1 X = don’t care. Rev. D | Page 8 of 16 Document Outline FEATURES FUNCTIONAL BLOCK DIAGRAMS GENERAL DESCRIPTION PRODUCT HIGHLIGHTS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS DUAL SUPPLY SINGLE SUPPLY ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TEST CIRCUITS SINGLE-SUPPLY OCTAL DAC APPLICATION OUTLINE DIMENSIONS ORDERING GUIDE
ADG508A/ADG509A PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS EN A0 NC A1 A2 EN A0 NC A1 A2 3 2 1 20 19 3 2 1 20 19 A0 1 16 A1 V 4 18 GND V 4 PIN 1 18 GND EN SS 2 15 A2 SS IDENTIFIER S1 5 17 V S1 5 17 V V DD DD SS 3 14 GND ADG508A ADG508A NC 6 16 NC ADG508A S1 NC 6 16 NC 4 TOP VIEW 13 V TOP VIEW DD TOP VIEW (Not to Scale) S2 7 (Not to Scale) 15 S5 (Not to Scale) S2 5 S2 S5 12 S5 7 15 S3 8 14 S6 S3 6 11 S6 S3 8 14 S6 S4 7 10 S7
3 4 5
9
-00
9 10 11 12 13
00
10 11 12 13 NC = NO CONNECT
-00
D NC = NO CONNECT
1-
8 9 S8
51
D S4
05
NC S8 S7 S4 D
051 0 000 00
NC S8 S7
0 Figure 3. ADG508A DIP, SOIC Figure 4. ADG508A LCC Figure 5. ADG508A PLCC
Table 4. ADG508A Pin Function Description Pin Number DIP/SOIC PLCC/LCC Mnemonic Description
1 2 A0 Logic Control Input. 2 3 EN Active High Digital Input. When low, the device is disabled and all switches are off. When high, Ax logic inputs determine on switches. 3 4 VSS Most Negative Power Supply Potential in Dual Supplies. In single-supply applications, it can be connected to ground. 4 5 S1 Source Terminal 1. Can be an input or an output. 5 7 S2 Source Terminal 2. Can be an input or an output. 6 8 S3 Source Terminal 3. Can be an input or an output. 7 9 S4 Source Terminal 4. Can be an input or an output. 8 10 D Drain Terminal. Can be an input or an output. 9 12 S8 Source Terminal 8. Can be an input or an output. 10 13 S7 Source Terminal 7. Can be an input or an output. 11 14 S6 Source Terminal 6. Can be an input or an output. 12 15 S5 Source Terminal 5. Can be an input or an output. 13 17 VDD Most Positive Power Supply Potential. 14 18 GND Ground (0 V) Reference. 15 19 A2 Logic Control Input. 16 20 A1 Logic Control Input. N/A 1 NC No Connect. N/A 6 NC No Connect. N/A 11 NC No Connect. N/A 16 NC No Connect.
Table 5. ADG508A Truth Table A2 A1 A0 EN On Switch
X1 X1 X1 0 None X 0 0 0 1 1 0 0 1 1 2 0 1 0 1 3 0 1 1 1 4 1 0 0 1 5 1 0 1 1 6 1 1 0 1 7 1 1 1 1 8 1 X = don’t care. Rev. D | Page 8 of 16 Document Outline FEATURES FUNCTIONAL BLOCK DIAGRAMS GENERAL DESCRIPTION PRODUCT HIGHLIGHTS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS DUAL SUPPLY SINGLE SUPPLY ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TEST CIRCUITS SINGLE-SUPPLY OCTAL DAC APPLICATION OUTLINE DIMENSIONS ORDERING GUIDE