Datasheet ADG824 (Analog Devices) - 7
| 制造商 | Analog Devices |
| 描述 | 0.5 Ω CMOS 1.65 V to 3.6 V Dual SPDT/2:1 Mux in Mini LFCSP Package |
| 页数 / 页 | 16 / 7 — Data Sheet. ADG824. PIN CONFIGURATION AND FUNCTION DESCRIPTIONS. PIN 1 … |
| 修订版 | C |
| 文件格式/大小 | PDF / 243 Kb |
| 文件语言 | 英语 |
Data Sheet. ADG824. PIN CONFIGURATION AND FUNCTION DESCRIPTIONS. PIN 1 INDICATOR. D1 2. 8 D2. TOP VIEW. S1B 3. (Not to Scale). 7 S2B. IN1
该数据表的模型线
文件文字版本
Data Sheet ADG824 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS A ND A S1 G S2 1 10 9 PIN 1 INDICATOR D1 2 ADG824 8 D2 TOP VIEW S1B 3 (Not to Scale) 7 S2B 4 5 6
012
IN1 IN2 DDV
06693- Figure 2. Pin Configuration
Table 5. Pin Function Descriptions Pin No. Mnemonic Description
1 S1A Source Terminal. This pin can be an input or an output. 2 D1 Drain Terminal. This pin can be an input or an output. 3 S1B Source Terminal. This pin can be an input or an output. 4 IN1 Logic Control Input. This pin controls Switch S1A and Switch S1B to D1. 5 IN2 Logic Control Input. This pin controls Switch S2A and Switch S2B to D2. 6 VDD Most Positive Power Supply Potential. 7 S2B Source Terminal. This pin can be an input or an output. 8 D2 Drain Terminal. This pin can be an input or an output. 9 S2A Source Terminal. This pin can be an input or an output. 10 GND Ground (0 V) Reference.
Table 6. ADG824 Truth Table Logic (IN1/IN2) Switch A (S1A or S2A) Switch B (S1B or S2B)
0 Off On 1 On Off Rev. C | Page 7 of 16 Document Outline Features Applications Functional Block Diagram General Description Product Highlights Revision History Specifications Absolute Maximum Ratings ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Test Circuits Terminology Outline Dimensions Ordering Guide
012
IN1 IN2 DDV
06693- Figure 2. Pin Configuration
Table 5. Pin Function Descriptions Pin No. Mnemonic Description
1 S1A Source Terminal. This pin can be an input or an output. 2 D1 Drain Terminal. This pin can be an input or an output. 3 S1B Source Terminal. This pin can be an input or an output. 4 IN1 Logic Control Input. This pin controls Switch S1A and Switch S1B to D1. 5 IN2 Logic Control Input. This pin controls Switch S2A and Switch S2B to D2. 6 VDD Most Positive Power Supply Potential. 7 S2B Source Terminal. This pin can be an input or an output. 8 D2 Drain Terminal. This pin can be an input or an output. 9 S2A Source Terminal. This pin can be an input or an output. 10 GND Ground (0 V) Reference.
Table 6. ADG824 Truth Table Logic (IN1/IN2) Switch A (S1A or S2A) Switch B (S1B or S2B)
0 Off On 1 On Off Rev. C | Page 7 of 16 Document Outline Features Applications Functional Block Diagram General Description Product Highlights Revision History Specifications Absolute Maximum Ratings ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Test Circuits Terminology Outline Dimensions Ordering Guide