Datasheet MAX9691, MAX9692, MAX9693 (Maxim) - 8

Single/Dual, Ultra-Fast, ECL-Output Comparators with Latch Enable Definition of Terms
tpw(LE) Latch-Enable Pulse Width. The minimum time VOS Input Offset Voltage. The voltage required the latch-enable signal must be high to acquire between the input terminals to obtain 0V dif- and hold an input signal. ferential at the output. ts Setup Time. The minimum time before the VIN Input Voltage Pulse Amplitude negative transition of the latch-enable pulse V that an input signal must be present to be ac- OD Input Voltage Overdrive quired and held at the outputs. tpd+ Input to Output High Delay. The propagation delay measured from the time the input signal th Hold Time. The minimum time after the nega- crosses the input offset voltage to the 50% tive transition of the latch-enable signal that point of an output low-to-high transition. an input signal must remain unchanged to be acquired and held at the output. tpd- Input to Output Low Delay. The propagation delay measured from the time the input signal ∆pd Propagation Delay Skew. The difference in crosses the input offset voltage to the 50% propagation delay between the Q and Q out- point of an output high-to-low transition. puts crossing each other in both directions. t PDSP Propagation Delay Dispersion. The change in LE(+) Latch-Enable to Output High Delay. The prop- agation delay measured from the 50% point of propagation delay as a result of the overdrive the latch-enable signal low-to-high transition of the input signal varying. to the 50% point of an output low-to-high tran- tpdm Propagation Delay Match (MAX9693 only). sition. The difference in propagation delay between t two separate channels. LE(-) Latch-Enable to Output Low Delay. The prop- agation delay measured from the 50% point of the latch-enable signal low-to-high transition to the 50% point of an output high-to-low tran- sition.
MAX9691/MAX9692/MAX9693 Chip Information Ordering Information (continued)
PROCESS: BiCMOS
TEMP PART PIN-PACKAGE RANGE MAX9692
EUB -40°C to +85°C 10 µMAX MAX9692ESE -40°C to +85°C 16 Narrow SO MAX9692EPE -40°C to +85°C 16 PDIP
MAX9693
ESE -40°C to +85°C 16 Narrow SO MAX9693EEE -40°C to +85°C 16 QSOP MAX9693EPE -40°C to +85°C 16 PDIP
Note:
Devices are also available in lead(Pb)-free/RoHS-compli- ant packages. Specify lead-free by adding a “+” after the part number.
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