Datasheet SiT1881 (SiTime) - 4
| 制造商 | SiTime |
| 描述 | Automotive Ultra-Low Power, Low Jitter 32.768 kHz Oscillator |
| 页数 / 页 | 8 / 4 — SiT1881. Electrical Characteristics. Table 1. Electrical Characteristics. … |
| 文件格式/大小 | PDF / 472 Kb |
| 文件语言 | 英语 |
SiT1881. Electrical Characteristics. Table 1. Electrical Characteristics. Parameter. Symbol. Min. Typ. Max. Unit. Condition
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link to page 4 PRELIMINARY
SiT1881
Automotive Ultra-Low Power, Low Jitter 32.768 kHz Oscillator
Electrical Characteristics Table 1. Electrical Characteristics
Conditions: Min/Max limits are over temperature, VDD = 1.8 ±10%, unless otherwise stated Typical are at 30°C and DD = 1.8 V.
Parameter Symbol Min. Typ. Max. Unit Condition Frequency and Stability Output Frequency
FOUT 32.768 kHz Default 32.768 kHz Output. Factory Programmable to other frequencies, where fout=2n, n = 0 – 18 (default n=15). Contact SiTime for other frequencies
Initial Frequency Tolerance
F_tol -10 – +10 ppm Includes 2x reflow, at 30°C
Frequency Stability[2]
F_stab Contact SiTime for ±20 ppm option -50 – 50 rdering Code “3”: Over temperature, VDD, aging, board-level underfill, and 20% load variation. -100 – 100 rdering Code “4”: Over temperature, VDD, aging, board-level underfill, and 20% load variation.
Jitter Performance Integrated Phase Jitter
IPJ – 3 9 nsRMS FOUT = 32 kHz. Integration bandwidth = 100 Hz to 16 kHz. Inclusive of 50 mV peak-to-peak sinusoidal noise on VDD. Noise frequency 100 Hz to 20 MHz. Contact SiTime for lower jitter performance.
RMS Period Jitter
PJ – 2.5 8 nsRMS Cycles = 10,000, f = 32.768 kHz. Per JEDEC standard 65B
Supply Voltage and Current Consumption Operating Supply Voltage
VDD 1.14 – 1.35 V Ordering Code: WW VDD 1.35 – 3.63 V Ordering Code: XX
No Load Supply Current
IDD – 490 600 nA Fout = 32.768 kHz, VDD = 1.8 V; -40°C to 85°C 490 800 Fout = 32.768 kHz, VDD = 1.8 V; -40°C to 105°C
Start-up Time at Power-up
t_start – – 100 ms Measured when supply reaches 90% of final VDD to the first output pulse.
Output Characteristics Output Rise/Fall Time
tR, tF 20 40 ns 15 pF load, 20% to 80% of VDD for LVCMOS. 20% to 80% of VOH for Reduced Swing outputs. Factory Programmable Rise/Fall times. Contact SiTime for details.
Output Clock Duty Cycle
DC 45 – 55 %
LVCMOS Output Output Voltage High
VOH 90% – VDD IOH = -1 µA
Output Voltage Low
VOL – – 10% VDD IOL = 1 µA
Reduced Swing Output Output Voltage High
VOH 0.6 – 2.7 V IOH = -1 µA. Factory Programmable VOH from 0.6 V to 2.7 V @ 0.1 V steps for VDD > VOH+0.5V
Output Voltage Low
VOL – – 0.1 V IOL = 1 µA
Operating Temperature Range
-40 – +105 °C Ordering Code (E); ±50 ppm stability over temperature
Note:
2. Tested with Agilent 53132A frequency counter easured with ≥100 ms gate time for accurate frequency measurement Rev 0.8 Page 4 of 8 Proprietary & Confidential of SiTime
SiT1881
Automotive Ultra-Low Power, Low Jitter 32.768 kHz Oscillator
Electrical Characteristics Table 1. Electrical Characteristics
Conditions: Min/Max limits are over temperature, VDD = 1.8 ±10%, unless otherwise stated Typical are at 30°C and DD = 1.8 V.
Parameter Symbol Min. Typ. Max. Unit Condition Frequency and Stability Output Frequency
FOUT 32.768 kHz Default 32.768 kHz Output. Factory Programmable to other frequencies, where fout=2n, n = 0 – 18 (default n=15). Contact SiTime for other frequencies
Initial Frequency Tolerance
F_tol -10 – +10 ppm Includes 2x reflow, at 30°C
Frequency Stability[2]
F_stab Contact SiTime for ±20 ppm option -50 – 50 rdering Code “3”: Over temperature, VDD, aging, board-level underfill, and 20% load variation. -100 – 100 rdering Code “4”: Over temperature, VDD, aging, board-level underfill, and 20% load variation.
Jitter Performance Integrated Phase Jitter
IPJ – 3 9 nsRMS FOUT = 32 kHz. Integration bandwidth = 100 Hz to 16 kHz. Inclusive of 50 mV peak-to-peak sinusoidal noise on VDD. Noise frequency 100 Hz to 20 MHz. Contact SiTime for lower jitter performance.
RMS Period Jitter
PJ – 2.5 8 nsRMS Cycles = 10,000, f = 32.768 kHz. Per JEDEC standard 65B
Supply Voltage and Current Consumption Operating Supply Voltage
VDD 1.14 – 1.35 V Ordering Code: WW VDD 1.35 – 3.63 V Ordering Code: XX
No Load Supply Current
IDD – 490 600 nA Fout = 32.768 kHz, VDD = 1.8 V; -40°C to 85°C 490 800 Fout = 32.768 kHz, VDD = 1.8 V; -40°C to 105°C
Start-up Time at Power-up
t_start – – 100 ms Measured when supply reaches 90% of final VDD to the first output pulse.
Output Characteristics Output Rise/Fall Time
tR, tF 20 40 ns 15 pF load, 20% to 80% of VDD for LVCMOS. 20% to 80% of VOH for Reduced Swing outputs. Factory Programmable Rise/Fall times. Contact SiTime for details.
Output Clock Duty Cycle
DC 45 – 55 %
LVCMOS Output Output Voltage High
VOH 90% – VDD IOH = -1 µA
Output Voltage Low
VOL – – 10% VDD IOL = 1 µA
Reduced Swing Output Output Voltage High
VOH 0.6 – 2.7 V IOH = -1 µA. Factory Programmable VOH from 0.6 V to 2.7 V @ 0.1 V steps for VDD > VOH+0.5V
Output Voltage Low
VOL – – 0.1 V IOL = 1 µA
Operating Temperature Range
-40 – +105 °C Ordering Code (E); ±50 ppm stability over temperature
Note:
2. Tested with Agilent 53132A frequency counter easured with ≥100 ms gate time for accurate frequency measurement Rev 0.8 Page 4 of 8 Proprietary & Confidential of SiTime