Datasheet HUF75652G3 (ON Semiconductor) - 7
| 制造商 | ON Semiconductor |
| 描述 | MOSFET – Power, N-Channel, Ultrafet 100 V, 75 A, 8 mW |
| 页数 / 页 | 12 / 7 — HUF75652G3. TEST CIRCUITS AND WAVEFORMS. VDS. BVDSS. VARY t P TO OBTAIN. … |
| 文件格式/大小 | PDF / 553 Kb |
| 文件语言 | 英语 |
HUF75652G3. TEST CIRCUITS AND WAVEFORMS. VDS. BVDSS. VARY t P TO OBTAIN. IAS. REQUIRED PEAK I. VDD. VGS. DUT. 0.01. tAV
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文件文字版本
HUF75652G3 TEST CIRCUITS AND WAVEFORMS VDS BVDSS L tP VDS VARY t P TO OBTAIN IAS + V REQUIRED PEAK I R DD AS G VDD VGS − DUT tP 0V IAS 0 0.01
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tAV Figure 14. UNCLAMPED ENERGY TEST CIRCUIT Figure 15. UNCLAMPED ENERGY WAVEFORMS VDS R V L DD Qg(TOT) VDS VGS = 20V VGS + Qg(10) VDD − V V GS GS = 10V DUT VGS = 2V IG(REF) 0 Qg(TH) Qgs Qgd Ig(REF) 0 Figure 16. GATE CHARGE TEST CIRCUIT Figure 17. GATE CHARGE WAVEFORM VDS tON tOFF td(ON) td(OFF) RL tr tf VDS 90% 90% + VGS VDD 10% 10% − 0 DUT 90% RGS VGS 50% 50% PULSE WIDTH VGS 10% 0 Figure 18. SWITCHING TIME TEST CIRCUIT Figure 19. SWITCHING TIME WAVEFORM www.onsemi.com 7
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tAV Figure 14. UNCLAMPED ENERGY TEST CIRCUIT Figure 15. UNCLAMPED ENERGY WAVEFORMS VDS R V L DD Qg(TOT) VDS VGS = 20V VGS + Qg(10) VDD − V V GS GS = 10V DUT VGS = 2V IG(REF) 0 Qg(TH) Qgs Qgd Ig(REF) 0 Figure 16. GATE CHARGE TEST CIRCUIT Figure 17. GATE CHARGE WAVEFORM VDS tON tOFF td(ON) td(OFF) RL tr tf VDS 90% 90% + VGS VDD 10% 10% − 0 DUT 90% RGS VGS 50% 50% PULSE WIDTH VGS 10% 0 Figure 18. SWITCHING TIME TEST CIRCUIT Figure 19. SWITCHING TIME WAVEFORM www.onsemi.com 7