Key Features (Continued) n Up to fourteen multi-source vectored interrupts servicing — External Interrupt with selectable edge FamilyAdditional Peripheral Features — Idle Timer T0 — Three Timers (one timer for the CS series)(each with n Idle Timer 2 interrupts) n Multi-Input Wake-Up (MIWU) with optional interrupts (8) — MICROWIRE/PLUS n Two analog comparators (one for the CS series) — Multi-Input Wake-Up n WATCHDOG and Clock Monitor logic — Software Trap n MICROWIRE/PLUS serial I/O — USART (2) COP888xG/CS — Default VIS (default interrupt) I/O Features n 8-bit Stack Pointer SP — (stack in RAM) n Two 8-bit Register Indirect Data Memory Pointers n Memory mapped I/O (B and X) n Software selectable I/O options (TRI-STATE® Output, Push-Pull Output, Weak Pull-Up Input, High Impedance Input) Fully Static CMOS n Up to 8 high current outputs n Two power saving modes: HALT and IDLE n Schmitt trigger inputs on ports G and L n Low current drain (typically <1 µA) n Packages: n Single supply operation: 2.5V–5.5V (COP88x) — 44 PQFP with 40 I/O pins n Temperature ranges: — 44 PLCC with 40 I/O pins 0˚C to +70˚C, −40˚C to +85˚C, and −55˚C to +125˚C — 40 DIP with 36 I/O pins — 28 DIP/SOIC with 24 I/O pins Development SupportCPU/Instruction Set Features n Emulation and OTP devices n Real time emulation and full program debug offered by n 1 µs instruction cycle time MetaLink’s Development System n Versatile and easy to use instruction set Block Diagram DS012829-1 FIGURE 1. COP888xG Block Diagram www.national.com 2