Datasheet AD8343 (Analog Devices) - 6
| 制造商 | Analog Devices |
| 描述 | DC-to-2.5 GHz High IP3 Active Mixer |
| 页数 / 页 | 32 / 6 — AD8343. PIN CONFIGURATION AND FUNCTION DESCRIPTIONS. COMM 1. 14 COMM. … |
| 文件格式/大小 | PDF / 2.2 Mb |
| 文件语言 | 英语 |
AD8343. PIN CONFIGURATION AND FUNCTION DESCRIPTIONS. COMM 1. 14 COMM. INPP 2. AD8343 13 OUTP. TOP VIEW. INPM 3. 12 OUTM. (Not to Scale)
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AD8343 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS COMM 1 14 COMM INPP 2 AD8343 13 OUTP TOP VIEW INPM 3 12 OUTM (Not to Scale) DCPL 4 11 COMM VPOS 5 10 LOIP PWDN 6 9 LOIM COMM 7 8 COMM
02 0 4- 03 01 Figure 2. Pin Configuration
Table 5. Pin Function Descriptions Pin No. Mnemonic Description
1, 7, 8, 11, 14 COMM Connect to low impedance circuit ground. 2 INPP Differential Input Pin. This pin needs to be dc-biased and typically ac-coupled; see Figure 3. 3 INPM Differential Input Pin. This pin needs to be dc-biased and typically ac-coupled; see Figure 3. 4 DCPL Bias rail decoupling capacitor connection for LO driver; see Figure 6. 5 VPOS Positive Supply Voltage (VS), 4.5 V to 5.5 V. Ensure adequate supply bypassing for proper device operation as shown in the Applications section. 6 PWDN Power-Down Interface. Connect pin to ground for normal operating mode. Connect pin to supply for power- down mode; see Figure 5. 9 LOIM Differential Local Oscillator (LO) Input Pin. Typically ac-coupled; see Figure 4. 10 LOIP Differential Local Oscillator (LO) Input Pin. Typically ac-coupled; see Figure 4. 12 OUTM Open-Collector Differential Output Pin. This pin needs to be dc-biased and (usually) ac-coupled; see Figure 3. 13 OUTP Open-Collector Differential Output Pin. This pin needs to be dc-biased and (usually) ac-coupled; see Figure 3. Rev. B | Page 6 of 32 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS BASIC OPERATING INSTRUCTIONS TYPICAL AC PERFORMANCE TYPICAL ISOLATION PERFORMANCE ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS RECEIVER CHARACTERISTICS TRANSMIT CHARACTERISTICS CIRCUIT DESCRIPTION DC INTERFACES BIASING AND DECOUPLING (VPOS, DCPL) POWER-DOWN INTERFACE (PWDN) AC INTERFACES INPUT INTERFACE (INPP AND INPM) SINGLE-ENDED-TO-DIFFERENTIAL CONVERSION INPUT MATCHING CONSIDERATIONS INPUT BIASING CONSIDERATIONS OUTPUT INTERFACE (OUTP, OUTM) OUTPUT MATCHING CONSIDERATIONS OUTPUT BIASING CONSIDERATIONS INPUT AND OUTPUT STABILITY CONSIDERATIONS LOCAL OSCILLATOR INPUT INTERFACE (LOIP, LOIM) DC COUPLING THE LO A STEP-BY-STEP APPROACH TO IMPEDANCE MATCHING Circuit Setup Establish Target Impedance Measure AD8343 Differential Impedance at Location of First Matching Component Design the Matching Network Transfer the Matching Network to the Final Design APPLICATIONS DOWNCONVERTING MIXER UPCONVERTING MIXER EVALUATION BOARD OUTLINE DIMENSIONS ORDERING GUIDE
AD8343 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS COMM 1 14 COMM INPP 2 AD8343 13 OUTP TOP VIEW INPM 3 12 OUTM (Not to Scale) DCPL 4 11 COMM VPOS 5 10 LOIP PWDN 6 9 LOIM COMM 7 8 COMM
02 0 4- 03 01 Figure 2. Pin Configuration
Table 5. Pin Function Descriptions Pin No. Mnemonic Description
1, 7, 8, 11, 14 COMM Connect to low impedance circuit ground. 2 INPP Differential Input Pin. This pin needs to be dc-biased and typically ac-coupled; see Figure 3. 3 INPM Differential Input Pin. This pin needs to be dc-biased and typically ac-coupled; see Figure 3. 4 DCPL Bias rail decoupling capacitor connection for LO driver; see Figure 6. 5 VPOS Positive Supply Voltage (VS), 4.5 V to 5.5 V. Ensure adequate supply bypassing for proper device operation as shown in the Applications section. 6 PWDN Power-Down Interface. Connect pin to ground for normal operating mode. Connect pin to supply for power- down mode; see Figure 5. 9 LOIM Differential Local Oscillator (LO) Input Pin. Typically ac-coupled; see Figure 4. 10 LOIP Differential Local Oscillator (LO) Input Pin. Typically ac-coupled; see Figure 4. 12 OUTM Open-Collector Differential Output Pin. This pin needs to be dc-biased and (usually) ac-coupled; see Figure 3. 13 OUTP Open-Collector Differential Output Pin. This pin needs to be dc-biased and (usually) ac-coupled; see Figure 3. Rev. B | Page 6 of 32 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS BASIC OPERATING INSTRUCTIONS TYPICAL AC PERFORMANCE TYPICAL ISOLATION PERFORMANCE ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS RECEIVER CHARACTERISTICS TRANSMIT CHARACTERISTICS CIRCUIT DESCRIPTION DC INTERFACES BIASING AND DECOUPLING (VPOS, DCPL) POWER-DOWN INTERFACE (PWDN) AC INTERFACES INPUT INTERFACE (INPP AND INPM) SINGLE-ENDED-TO-DIFFERENTIAL CONVERSION INPUT MATCHING CONSIDERATIONS INPUT BIASING CONSIDERATIONS OUTPUT INTERFACE (OUTP, OUTM) OUTPUT MATCHING CONSIDERATIONS OUTPUT BIASING CONSIDERATIONS INPUT AND OUTPUT STABILITY CONSIDERATIONS LOCAL OSCILLATOR INPUT INTERFACE (LOIP, LOIM) DC COUPLING THE LO A STEP-BY-STEP APPROACH TO IMPEDANCE MATCHING Circuit Setup Establish Target Impedance Measure AD8343 Differential Impedance at Location of First Matching Component Design the Matching Network Transfer the Matching Network to the Final Design APPLICATIONS DOWNCONVERTING MIXER UPCONVERTING MIXER EVALUATION BOARD OUTLINE DIMENSIONS ORDERING GUIDE