Datasheet MBRS2040 (ON Semiconductor) - 4
| 制造商 | ON Semiconductor |
| 描述 | Surface Mount Schottky Power Rectifier SMB Power Surface Mount Package |
| 页数 / 页 | 6 / 4 — MBRS2040LT3G, NRVBS2040LT3G, NRVBS2040LN. Figure 7. Capacitance. Figure … |
| 文件格式/大小 | PDF / 310 Kb |
| 文件语言 | 英语 |
MBRS2040LT3G, NRVBS2040LT3G, NRVBS2040LN. Figure 7. Capacitance. Figure 8. Typical Operating Temperature Derating*
该数据表的模型线
文件文字版本
MBRS2040LT3G, NRVBS2040LT3G, NRVBS2040LN
1000 125 ° Rtja = 22.5°C/W 115 TURE ( C) TJ = 25°C 105 TEMPERA ANCE (pF) 100 95 ACIT TING 42°C/W 85 61°C/W C, CAP 78°C/W TED OPERA 75 92°C/W , DERA 10 T J 65 0 5.0 10 15 20 25 30 35 40 0 5.0 10 15 20 25 30 35 40 VR, REVERSE VOLTAGE (VOLTS) VR, DC REVERSE VOLTAGE (VOLTS)
Figure 7. Capacitance Figure 8. Typical Operating Temperature Derating*
* Reverse power dissipation and the possibility of thermal runaway must be considered when operating this device under any re- verse voltage conditions. Calculations of TJ therefore must include forward and reverse power effects. The allowable operating TJ may be calculated from the equation: TJ = TJmax − r(t)(Pf + Pr) where r(t) = thermal impedance under given conditions, Pf = forward power dissipation, and Pr = reverse power dissipation This graph displays the derated allowable TJ due to reverse bias under DC conditions only and is calculated as TJ = TJmax − r(t)Pr, where r(t) = Rthja. For other power applications further calculations must be performed. 1.0 50% (NORMALIZED) 20% 10% ANCE 0.1 5.0% RESIST 2.0% 0.01 1.0% THERMAL Rtjl(t) = Rtjl*r(t) 0.001 , TRANSIENT 0.00001 0.0001 0.001 0.01 0.1 1.0 10 100 (T)R T, TIME (s)
Figure 9. Thermal Response Junction to Lead
1.0 50% (NORMALIZED) 20% ANCE 0.1 10% RESIST 5.0% 2.0% 0.01 THERMAL 1.0% Rtjl(t) = Rtjl*r(t) 0.001 , TRANSIENT (T) 0.00001 0.0001 0.001 0.01 0.1 1.0 10 100 1,000 R T, TIME (s)
Figure 10. Thermal Response Junction to Ambient www.onsemi.com 4
1000 125 ° Rtja = 22.5°C/W 115 TURE ( C) TJ = 25°C 105 TEMPERA ANCE (pF) 100 95 ACIT TING 42°C/W 85 61°C/W C, CAP 78°C/W TED OPERA 75 92°C/W , DERA 10 T J 65 0 5.0 10 15 20 25 30 35 40 0 5.0 10 15 20 25 30 35 40 VR, REVERSE VOLTAGE (VOLTS) VR, DC REVERSE VOLTAGE (VOLTS)
Figure 7. Capacitance Figure 8. Typical Operating Temperature Derating*
* Reverse power dissipation and the possibility of thermal runaway must be considered when operating this device under any re- verse voltage conditions. Calculations of TJ therefore must include forward and reverse power effects. The allowable operating TJ may be calculated from the equation: TJ = TJmax − r(t)(Pf + Pr) where r(t) = thermal impedance under given conditions, Pf = forward power dissipation, and Pr = reverse power dissipation This graph displays the derated allowable TJ due to reverse bias under DC conditions only and is calculated as TJ = TJmax − r(t)Pr, where r(t) = Rthja. For other power applications further calculations must be performed. 1.0 50% (NORMALIZED) 20% 10% ANCE 0.1 5.0% RESIST 2.0% 0.01 1.0% THERMAL Rtjl(t) = Rtjl*r(t) 0.001 , TRANSIENT 0.00001 0.0001 0.001 0.01 0.1 1.0 10 100 (T)R T, TIME (s)
Figure 9. Thermal Response Junction to Lead
1.0 50% (NORMALIZED) 20% ANCE 0.1 10% RESIST 5.0% 2.0% 0.01 THERMAL 1.0% Rtjl(t) = Rtjl*r(t) 0.001 , TRANSIENT (T) 0.00001 0.0001 0.001 0.01 0.1 1.0 10 100 1,000 R T, TIME (s)
Figure 10. Thermal Response Junction to Ambient www.onsemi.com 4